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Title:
METHOD AND APPARATUS FOR IMPLEMENTING DYNAMIC OUT-OF-ORDER PROCESSOR PIPELINE
Document Type and Number:
Japanese Patent JP2017027636
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a hardware/software co-design for an optimized dynamic out-of-order VLIW pipeline.SOLUTION: An apparatus comprises; an instruction fetch unit 138 configured to fetch VLIWs in their program order from memory, each VLIW comprising a plurality of RISC instruction syllables grouped into the VLIWs in an order which removes data-flow dependencies and false output dependencies between the syllables; a decode unit 140 configured to decode the VLIWs in their program order and output the syllables of each decoded VLIW in parallel; and an out-of-order execution engine 150 configured to execute the syllables in parallel with other syllables in a different order than the order in which they are received from the decode unit. The out-of-order execution engine 150 has one or more processing stages which do not check for data-flow dependencies and false output dependencies between the syllables when performing operations.SELECTED DRAWING: Figure 1B

Inventors:
DENIS M KHARTIKOV
NAVEEN NEELAKANTAM
JOHN H KELM
POLYCHRONIS XEKALAKIS
Application Number:
JP2016221057A
Publication Date:
February 02, 2017
Filing Date:
November 11, 2016
Export Citation:
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Assignee:
INTEL CORP
International Classes:
G06F9/38; G06F9/30; G06F9/45; G06F9/455
Domestic Patent References:
JP6043374B22016-12-14
Foreign References:
US6081884A2000-06-27
Other References:
中田 尚,外2名: "“VLIW型命令キューを持つスーパスカラプロセッサの命令スケジューリング機構”", 情報処理学会論文誌 コンピューティングシステム VOL.2 NO.2, JPN6019005541, 2 July 2009 (2009-07-02), JP, pages 第48頁−第62頁
Attorney, Agent or Firm:
Longhua International Patent Service Corporation