Title:
【発明の名称】変調閉回路における遅延補償の方法および装置
Document Type and Number:
Japanese Patent JP2002503051
Kind Code:
A
Abstract:
A modulator loop designed to operate in a frequency range of interest is described. The loop includes a loop output terminal and a switching stage, the output of which is coupled to the loop output terminal. The switching stage has a first delay associated therewith. The output of a modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the loop output terminal and the feedback input of the modulator stage. A feedback filter is coupled between the output of the modulator stage and the feedback input of the modulator stage which compensates for the first delay. The feedback filter is operable to transmit frequencies outside the frequency range of interest and attenuate frequencies in the frequency range of interest.
Inventors:
Delano, Cary El.
Tripty, Adyaes.
Tripty, Adyaes.
Application Number:
JP2000530980A
Publication Date:
January 29, 2002
Filing Date:
February 05, 1999
Export Citation:
Assignee:
Tripas Technology, Inc.
International Classes:
H03C1/06; H03F3/217; H04B1/04; H03K7/08; (IPC1-7): H04B1/04; H03F3/217; H03K7/08
Attorney, Agent or Firm:
Hironobu Onda (1 person outside)