Title:
エッチングで形成された溝を用いて厚い誘電体領域を形成する方法
Document Type and Number:
Japanese Patent JP4949851
Kind Code:
B2
Abstract:
A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The method also includes providing in the semiconductor substrate one or more trenches, first mesas and second mesas. The method also includes oxidizing sidewalls and bottoms of each trench; depositing a doped oxide into each trench and on the tops of the first and second mesas; and thermally oxidizing the semiconductor substrate at a temperature sufficient enough to cause the deposited oxide to flow so that the silicon in each of the first mesas is completely converted to silicon dioxide while the silicon in each of the second mesas is only partially converted to silicon dioxide and so that each of the trenches is filled with oxide.
Inventors:
Blanchard, Richard A
Application Number:
JP2006545731A
Publication Date:
June 13, 2012
Filing Date:
December 08, 2004
Export Citation:
Assignee:
Third Dimension (Threeday) Semiconductor Inc.
International Classes:
H01L21/336; H01L21/316; H01L21/331; H01L21/76; H01L21/762; H01L29/06; H01L29/12; H01L29/78; H01L21/265
Domestic Patent References:
| JP5190663A | ||||
| JP2002124675A | ||||
| JP2001345444A | ||||
| JP56130942A | ||||
| JP59132142A |
Foreign References:
| US5926713 |
Attorney, Agent or Firm:
Shuichiro Kitamura
Shoji Suzue
Toshiyuki Kimura
Shoji Suzue
Toshiyuki Kimura