Title:
焦電性材料の薄板から複数の素子チップを製造する方法
Document Type and Number:
Japanese Patent JP3849527
Kind Code:
B2
Abstract:
A method of producing plural device chips from a thin plate of a pyroelectric material comprises the following steps. First, plural device-forming regions each having an electrode and a circuit pattern for electrically connecting the electrodes are formed on each of front and rear surfaces of the thin plate to obtain a device substrate. By making an electrical connection between the circuit patterns, and grounding it, all of the device-forming regions on the device substrate are at the same potential. Next, a blast treatment is performed to the device substrate to remove a required region of the pyroelectric material, while leaving a bridge portion extending between adjacent device-forming regions and having the circuit patterns thereon, so that a device-chip aggregate is formed, in which adjacent device chips are coupled through the bridge portion. Subsequently, by removing the bridge portion, the device chip is separated from the device-chip aggregate.
Inventors:
Makoto Nishimura
Kimura Kenichi
Miyagawa Nobuyuki
Kawashima Masato
Nakamura Yoshimitsu
Motoi Ikari
Yuji Takada
Ryo Taniguchi
Kimura Kenichi
Miyagawa Nobuyuki
Kawashima Masato
Nakamura Yoshimitsu
Motoi Ikari
Yuji Takada
Ryo Taniguchi
Application Number:
JP2001547640A
Publication Date:
November 22, 2006
Filing Date:
December 21, 2000
Export Citation:
Assignee:
MATSUSHITA ELECTRIC WORKS,LTD.
International Classes:
H01L21/301; B23K26/00; G01J1/02; H01L27/14; H01L27/144; H01L37/02; B23K101/36
Domestic Patent References:
| JPH0950764A | 1997-02-18 | |||
| JPH07174621A | 1995-07-14 | |||
| JPH102793A | 1998-01-06 | |||
| JPS55107273A | 1980-08-16 |
Attorney, Agent or Firm:
Keisei Nishikawa
Atsuo Mori
Atsuo Mori