金属酸化物または金属シリケートゲート誘電体層を有する半導体デバイスの製造方法

Title:

金属酸化物または金属シリケートゲート誘電体層を有する半導体デバイスの製造方法

Document Type and Number:

Japanese Patent JP5177924

Kind Code:

B2

Abstract:

A process for forming a metal oxide or a metal silicate gate dielectric layer on a semiconductor substrate is disclosed. A suitably prepared substrate is placed in a chamber. An organic precursor gas is flowed into the chamber. An inorganic precursor gas is then flowed into the chamber. The organic precursor gas catalyzes a reaction between itself, the inorganic precursor and the substrate to form a dielectric layer on the substrate.

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Inventors:

Michael Steigerwald
Glen David Wilk

Application Number:

JP2001247517A

Publication Date:

April 10, 2013

Filing Date:

August 17, 2001

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Assignee:

Agia Systems Incorporated

International Classes:

C23C16/42; H01L21/316; H01L21/20; H01L21/28; H01L21/336; H01L29/51; H01L29/78

Domestic Patent References:

JP11330069A
JP7086269A

Attorney, Agent or Firm:

Okabe
Koji Yoshizawa
Masao Okabe
Nobuaki Kato
Kazuo
Shinichi Usui
Ikuo Fujino
Takao Ochi
Teruhisa Motomiya
Norimichi Takanashi
Asahi Shinmitsu
Seiichiro Takahashi

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