Title:
誤り訂正符号を得るための方法、誤り訂正符号を復号化するための方法、情報要素のブロックを符号化するための符号器、および、軟値の第1のブロックを復号化する復号器
Document Type and Number:
Japanese Patent JP4102174
Kind Code:
B2
Abstract:
The present invention concerns a method for obtaining an error correcting code of a given first size (N), including a systematic information part of a given second size (K) and a redundancy part. A block turbo-code is first obtained from said systematic information part and from predetermined information elements provided at known locations, said block turbo-code consisting in a product of elementary systematic block codes, at least said predetermined information elements being removed from the obtained block turbo-code to produce a shortened block turbo-code. An additional error correcting code is derived from at least a portion of said shortened block turbo-code and said shortened block turbo-code is stuffed with stuffing elements so as to attain said given first size, said stuffing elements being information elements of said additional error correcting code.
More Like This:
WO/1993/014455 | COMPUTER MEMORY ARRAY CONTROL |
JP4606852 | How to simplify the bitter bit decoder |
JPH0814796 | [Title of Invention] Parity Ella-Processing Method |
Inventors:
Nadine Chaparren
Arno Guguen
Damian Castellan
Arno Guguen
Damian Castellan
Application Number:
JP2002351472A
Publication Date:
June 18, 2008
Filing Date:
December 03, 2002
Export Citation:
Assignee:
Mitsubishi Electric Information Technology Center Europe BV
International Classes:
G06F11/10; H03M13/29; H03M13/00; H03M13/23; H04L1/00
Domestic Patent References:
JP2002542706A | ||||
JP2001244822A | ||||
JP2001257600A |
Attorney, Agent or Firm:
Michiharu Soga
Hidetoshi Furukawa
Suzuki Kenchi
Kajinami order
Hidetoshi Furukawa
Suzuki Kenchi
Kajinami order