Title:
The method and system for generating the inspection process for wafers
Document Type and Number:
Japanese Patent JP6204336
Kind Code:
B2
Abstract:
Methods and systems for generating an inspection process for a wafer are provided. One computer-implemented method includes separately determining a value of a local attribute for different locations within a design for a wafer based on a defect that can cause at least one type of fault mechanism at the different locations. The method also includes determining a sensitivity with which defects will be reported for different locations on the wafer corresponding to the different locations within the design based on the value of the local attribute. In addition, the method includes generating an inspection process for the wafer based on the determined sensitivity. Groups may be generated based on the value of the local attribute thereby assigning pixels that will have at least similar noise statistics to the same group, which can be important for defect detection algorithms. Better segmentation may lead to better noise statistics estimation.
Inventors:
Zion Yang
Application Number:
JP2014258430A
Publication Date:
September 27, 2017
Filing Date:
December 22, 2014
Export Citation:
Assignee:
KLA-TENCOR CORPORATION
International Classes:
H01L21/66
Domestic Patent References:
| JP2002323458A | ||||
| JP2008078635A | ||||
| JP2005156475A | ||||
| JP2004045066A | ||||
| JP2007536560A | ||||
| JP2003215060A |
Attorney, Agent or Firm:
Meisei International Patent Office