Title:
変調器
Document Type and Number:
Japanese Patent JP7241609
Kind Code:
B2
Abstract:
To provide a modulator capable of removing a clock leak component even when an analog bandpass filter does not have a steep frequency characteristic.SOLUTION: A master clock signal generated by a clock generation unit 110 is input to a modulation unit 120, a conversion unit 130, and an adjustment unit 140. The modulation unit 120 modulates target data and outputs the modulated data. The conversion unit 130 converts the modulated data into analog data, and outputs a modulation output signal containing a modulation signal and a clock leak. The adjustment unit 140 adjusts a phase of the input master clock signal to an antiphase of the clock leak, adjusts an amplitude of the input master clock signal to an amplitude of the clock leak, and outputs a clock leak suppression signal. An addition unit 150 adds the clock leak suppression signal to the modulation output signal, and outputs a modulation output signal after the clock leak has been suppressed.SELECTED DRAWING: Figure 1
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Inventors:
Eriko Hirayama
Akinori Fujimura
Hiroshi Hattori
Hideki Ishihara
Akinori Fujimura
Hiroshi Hattori
Hideki Ishihara
Application Number:
JP2019104597A
Publication Date:
March 17, 2023
Filing Date:
June 04, 2019
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H04B1/04
Domestic Patent References:
JP2008091985A | ||||
JP2006237976A | ||||
JP8204772A | ||||
JP2005020288A | ||||
JP2012506172A | ||||
JP2014150500A |
Foreign References:
US20100173596 | ||||
KR100735420B1 |
Attorney, Agent or Firm:
Patent Attorney Corporation Cross Border Patent Office
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