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Title:
LOGIC CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH0519910
Kind Code:
A
Abstract:

PURPOSE: To prevent the circuit parts of a CMOS system on a printed circuit board from being destroyed by turning off a power source supplied to the circuit parts of the CMOS system just after an excess current such as latch-up, etc., flows.

CONSTITUTION: A feeding layer 12a for CMOS parts and a feeding layer 12b for bipolar parts execute feeding to CMOS system circuit parts 13a-13c and bipolar system circuit parts 14a-14c on a printed circuit board 11 separately from a power supply part 17. A current value monitor circuit 15 monitors the current flowing from the feeding layer 12a for CMOS parts by a sensor 15a. When the excess current is detected, according to an instruction from the current value monitor circuit 15, a power source turn-off circuit 16 turns off the power source of the feeding layer 12a for CMOS parts.


Inventors:
KASUGA YASUHIRO
Application Number:
JP17150891A
Publication Date:
January 29, 1993
Filing Date:
July 12, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F1/28; G06F1/30; H02H3/087; (IPC1-7): G06F1/28; G06F1/30; H02H3/087
Attorney, Agent or Firm:
Uchihara Shin



 
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