Title:
光受信装置
Document Type and Number:
Japanese Patent JP4320569
Kind Code:
B2
Abstract:
A control circuit refers to a time schedule of a time slot assigned to each of slave stations, which is stored in a first storage, and an optical intensity of each of signal packets sent from the slave stations, which is stored in a second storage, and preliminarily knows when and from what slave station an upstream signal packet is received and the optical intensity of the upstream signal packet to be received. When the control circuit determines the optimum bias voltage of an APD, in an interval between signal packets, a bias control circuit provides a bias source with a timing signal, by which an output voltage of the bias source is changed, and a bias voltage setting signal. The bias source applies a bias voltage corresponding to the bias setting signal sent to the APD with the optimum timing synchronized with the timing signal.
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Inventors:
Nakazawa Atsushi
Application Number:
JP2003168307A
Publication Date:
August 26, 2009
Filing Date:
June 12, 2003
Export Citation:
Assignee:
Sumitomo Electric Industries, Ltd.
International Classes:
H01L31/107; H01J40/14; H04B10/2507; H04B10/272; H04B10/40; H04B10/50; H04B10/524; H04B10/54; H04B10/564; H04B10/60; H04B10/67; H04B10/69; H04B10/80
Domestic Patent References:
| JP11355218A | ||||
| JP4035330A | ||||
| JP9205408A | ||||
| JP9097694A | ||||
| JP57121354A | ||||
| JP61234106A | ||||
| JP3213024A | ||||
| JP3218136A | ||||
| JP10093511A | ||||
| JP2000244418A |
Attorney, Agent or Firm:
Inaoka cultivation
Mio Kawasaki
Mio Kawasaki