Title:
【発明の名称】位相検出誤りが最小の位相検出器
Document Type and Number:
Japanese Patent JPH10500260
Kind Code:
A
Abstract:
A phase detector is described that includes a load circuit that presents both a high differential impedance and a low common mode impedance. The load circuit is coupled to (1) a power supply and (2) a first node and a second node. The first and second nodes form an output of the phase detector. A capacitive circuit has (1) a first capacitor coupled to the first node and ground and (2) a second capacitor coupled to the second node and ground. A first circuit is coupled to the first and second nodes for detecting a phase difference between a first signal and a second signal. A second circuit is coupled to the first and second nodes for detecting the phase difference between the first and second signals and for minimizing phase detection error of the first circuit such that the phase difference between the first and second signals can be detected with minimized phase detection error. Each of the first and second circuits receives the first and second signals and a reference signal. The second circuit is cross-coupled to the first circuit such that an error current generated by the second circuit cancels that generated by the first circuit such that the phase detector detects the phase difference between the first and second signals with minimized phase detection error.
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Inventors:
Donnelly, Kevin S.
Lee, Thomas H
Ho, Zill-Chan
Lee, Thomas H
Ho, Zill-Chan
Application Number:
JP52124595A
Publication Date:
January 06, 1998
Filing Date:
February 01, 1995
Export Citation:
Assignee:
Rambus Incorporated
International Classes:
G01R25/00; H03K5/26; H03L7/085; (IPC1-7): H03K5/26; G01R25/00; H03L7/085
Attorney, Agent or Firm:
Masaki Yamakawa (5 outside)