Title:
TIMING-SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP3154449
Kind Code:
B2
Abstract:
PURPOSE: To achieve the compact configuration and the light weight of a circuit and to improve economy by providing a timing-pulse generating circuit having a counter, which counts clock pulses based on strobe pulses, and reducing the counters.
CONSTITUTION: After the input of a first strobe pulse SB1, a second strobe pulse SB2 is inputted after the elapse of a specified time Δ2. Then, a counter CT of a timing-pulse generating circuit TPG counts N clock pulses CLK, which are approximately equal to a specified time Δ3. Then, a pulse K1 is fed to an AND gate AD4. A pulse K2 is imparted into a second register RG through an OR gate. When the counter CT counts more than N clocks CLK, a pulse T is fed to a third register RG3, and the output Q is made to be L. The sum of the two times Δ2 and Δ3 corresponding to the time difference τ for deviating the timing of inverting the polarity is measured with one counter CT of the circuit TPD. Therefore, it is not necessary to provide two counters for every channel, and the economy is improved.
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Inventors:
Kobayashi, Satoshi
Application Number:
JP595993A
Publication Date:
April 09, 2001
Filing Date:
January 18, 1993
Export Citation:
Assignee:
ADVANTEST CORP
International Classes:
G01R31/28; G01R31/3183; G01R31/26; (IPC1-7): G01R31/28
Attorney, Agent or Firm:
草野 卓 （外１名）