PURPOSE: To process a measurement signal output from SQUID by synchronizing it with a clock of the same frequency as an alternating current bias electric current for SQUID.

CONSTITUTION: A negative pulse of a measurement signal VO is converted to a positive pulse by a negative inversion circuit 3, and it is outputted as a negative inversion pulse VM. As the measurement signal is delayed rather than the negative inversion pulse by a half-cycle delay circuit 4 by half a cycle of an alternating current bias electric current IB for SQUID and it is outputted as a delay pulse VD, it becomes possible for a process circuit 2 to process the negative inversion pulse VM and the delay pulse VD by way of synchronizing with a clock of the same frequency as the alternating current bias electric current IB.