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Patent Searching and Data


Title:
クロックエッジ復元を有するパルスカウンタ
Document Type and Number:
Japanese Patent JP2009545262
Kind Code:
A
Abstract:
An apparatus and a method for counting input pulses during a specific time interval are provided. A clock edge recovery output signal is produced in response to an input gating signal and a clock signal containing the input pulses. The clock edge recovery output signal contains a respective full clock pulse for each of either the rising or falling edge of the input pulses of the clock signal that occurs while the input gating signal is in an enable state and when the input gating signal transitions from the enable state to the disable state. A counter circuit counts the pulses contained in the clock edge recovery output signal.

Inventors:
Hong Bum Byung
Application Number:
JP2009522060A
Publication Date:
December 17, 2009
Filing Date:
July 06, 2007
Export Citation:
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Assignee:
Mosside Technologies, Inc.
International Classes:
H03K23/66; H03K5/135; H03K5/1532
Domestic Patent References:
JPH04302527A1992-10-26
JPH05327479A1993-12-10
JPH0918299A1997-01-17
JPH04117727A1992-04-17
JPH03113530U1991-11-20
JPH11506885A1999-06-15
JPH04302527A1992-10-26
JPH05327479A1993-12-10
JPH0918299A1997-01-17
JPH04117727A1992-04-17
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Keiji Kiuchi