Title:
A pulse duration modulator and its program
Document Type and Number:
Japanese Patent JP6217736
Kind Code:
B2
Abstract:
The pulse width modulator includes a subtraction unit configured to perform subtraction between an m value digital signal and a pulse width modulation signal; a feedforward filter unit configured such that a ΔΣ modulator to which an output signal of the subtraction unit is input and which includes integrators of a second order or higher is in cascade connection, and configured to operate with a sampling frequency FS; a product-sum computing unit configured to operate with a sampling frequency (FS/n) (n: an integer of two or more) to perform product-sum computing of an output signal of each integrator of the feedforward filter unit; and a pulse width modulation unit configured to operate with the sampling frequency (FS/n) to perform pulse width modulation of an output signal of the product-sum computing unit to output a pulse width modulation signal.
Inventors:
Shinya Hizuki
Application Number:
JP2015226867A
Publication Date:
October 25, 2017
Filing Date:
November 19, 2015
Export Citation:
Assignee:
Onkyo Co., Ltd.
International Classes:
H03M3/04; H03K7/08
Domestic Patent References:
| JP4116005B2 | ||||
| JP2002009624A | ||||
| JP2002237729A | ||||
| JP2004032095A |
Foreign References:
| US20070194827 | ||||
| US20050093727 |
Previous Patent: An information processor and a program
Next Patent: METHOD FOR TREATING AND PROCESSING JELLYFISHES
Next Patent: METHOD FOR TREATING AND PROCESSING JELLYFISHES