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Title:
無線送信回路及びそれを用いた送受信機
Document Type and Number:
Japanese Patent JP4327666
Kind Code:
B2
Abstract:
This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.

Inventors:
Satoshi Tanaka
Yukinori Akamine
Kawabe Manabu
Yasuyuki Kimura
Takao Okazaki
Application Number:
JP2004184779A
Publication Date:
September 09, 2009
Filing Date:
June 23, 2004
Export Citation:
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Assignee:
Renesas Technology Corp.
International Classes:
H04B1/04; H01Q11/12; H04B1/00
Domestic Patent References:
JP2000049646A
JP2003528529A
Attorney, Agent or Firm:
Polaire Patent Business Corporation
Katsuo Ogawa
Kyosuke Tanaka



 
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