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Title:
【発明の名称】カウンタの読出し制御装置とその制御方法
Document Type and Number:
Japanese Patent JP3350005
Kind Code:
B2
Abstract:
A counter readout control apparatus includes a plurality of counters, in which an upper-order counter performs a counting operation upon receiving a carry from a lower-order counter; a first means for resetting a flag-storing memory in which a carry of each counter, with an exception of an uppermost-order counter, is stored (Step S21); a second means for sequentially reading out the plurality of counters from an upper-order counter to a lower-order counter (Step S22 to S25); a third means for, after reading each counter value by means of the second means, testing as to whether the carry is set or not in the flag-storing memory (Step S26 to S29); and, a fourth means for, in the case in which the carry is set in the flag-storing memory, resetting the flag-storing memory having the carry (Step S27A, S28A, S29A) and performing a re-read operation only of counters having an order higher than an order of a counter which has been changed due to a reception of the carry (Step S22 to S25).

Inventors:
Masahiro Minami
Shigekazu Otsuka
Application Number:
JP30925999A
Publication Date:
November 25, 2002
Filing Date:
October 29, 1999
Export Citation:
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Assignee:
NC Microsystem Co., Ltd.
International Classes:
G06F7/50; G06F7/505; G06F9/00; G06F1/14; H03K21/12; H03K21/16; H03K21/40; H03K23/40; (IPC1-7): H03K21/40; H03K21/16
Domestic Patent References:
JP5126461A
JP50134753A
Attorney, Agent or Firm:
Yasuyuki Hata