Title:
RESIN-SEALING TYPE SEMICONDUCTOR PACKAGE
Document Type and Number:
Japanese Patent JP3003617
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent the electric short-circuit accident between a heat radiating plate exposed from resin and an I/O lead by the solder fused at the mounting time of a semiconductor package in the semiconductor package, wherein a semiconductor chip is sealed with the resin.
SOLUTION: At the rear surface of a resin 15 in a boundary region of a heat radiating metal plate 16 provided in a semiconductor package and an I/O lead 13, a concave groove 18 extending between the heat radiating metal plate 16 and the I/O lead 13 is provided as the blocking structure for blocking the flowing of a mounting solder. When a solder 32 for connecting the I/O lead 13 is fused at the mounting time of the semiconductor package on a mounting substrate 30, the flowing of the solder to the heat radiating metal plate 16 caused by the filling of the gas in the concave groove 18 is prevented. The electric short circuit between the I/O lead 13 and the heat radiating metal plate 16 can be prevented. Thus, the defective mounting is prevented.
Inventors:
Kiyoshi Takahashi
Application Number:
JP6072697A
Publication Date:
January 31, 2000
Filing Date:
March 14, 1997
Export Citation:
Assignee:
NEC
International Classes:
H01L23/28; H01L23/12; H05K3/34; (IPC1-7): H01L23/28; H01L23/12; H05K1/18
Domestic Patent References:
| JP5129473A | ||||
| JP59208756A | ||||
| JP59177934U | ||||
| JP59159957U | ||||
| JP61199001U | ||||
| JP313753U |
Attorney, Agent or Firm:
Suzuki Akio
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