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Title:
SAMPLING CIRCUIT, SAMPLING METHOD, AND SAMPLING OSCILLOSCOPE, AND WAVEFORM DISPLAY METHOD
Document Type and Number:
Japanese Patent JP2017003458
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a sampling circuit that excels in time accuracy and the cost of which is reduced.SOLUTION: A frequency synthesizer 11a outputs a periodic signal r(t) of a frequency that is dephased by a prescribed frequency Δf [Hz] from a frequency equal to an integral submultiple of a reference clock signal f0 synchronized to a signal ws to be measured. A sampler drive unit 11b outputs a trigger signal CLK from the periodic signal r(t). A first sampler unit 12 samples the signal ws to be measured with the timing of the trigger signal CLK. A second sampler unit 13a samples an I signal I(t) with the timing of the trigger signal CLK. A phase shifter 13b outputs a Q signal Q(t) that is 90° out of phase with the reference clock signal f0. A third sampler unit 13c samples the Q signal with the timing of the trigger signal CLK. A correction value calculation unit 13d calculates a correction value Δt(n) on the basis of sampling data I(n) and Q(n) and the set value t(n) of sampling time.SELECTED DRAWING: Figure 1

Inventors:
MOCHIZUKI TAKESHI
MURAKAMI TAKASHI
SUZUKI SEIYA
Application Number:
JP2015118368A
Publication Date:
January 05, 2017
Filing Date:
June 11, 2015
Export Citation:
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Assignee:
ANRITSU CORP
International Classes:
G01R13/34; G01R23/12
Domestic Patent References:
JP2007024657A2007-02-01
JP2007093296A2007-04-12
JP2011089832A2011-05-06
JP2007010411A2007-01-18
JP2006003326A2006-01-05
Foreign References:
US6522983B12003-02-18
Attorney, Agent or Firm:
Norimitsu Nishimura
Noriyuki Suzuki