Title:
SEMICONDUCTOR APPARATUS, DEBUG SYSTEM AND DEBUG PROGRAM
Document Type and Number:
Japanese Patent JP2019200455
Kind Code:
A
Abstract:
To provide a semiconductor apparatus capable of improving a debug function.SOLUTION: According to one embodiment, a semiconductor apparatus 10a includes: a CPU core 40 that executes a program to be debugged; a data change amount comparison mechanism 60 that compares a difference between a predetermined data value at a previous access and the predetermined data value at a current access with a threshold value in a change amount of the predetermined data value, with respect to the predetermined data value accessed by the program. In addition, the data change amount comparison mechanism 60 includes: a threshold data holding mechanism 62 that holds the threshold; and a data N holding mechanism 61 that holds the predetermined data value at the previous access, and compares the difference between the predetermined data value at the current access and the predetermined data value held in the data N holding mechanism 61 with the threshold value held in the threshold data holding mechanism 62.SELECTED DRAWING: Figure 4
Inventors:
SUZUKI ATSUSHI
Application Number:
JP2018092882A
Publication Date:
November 21, 2019
Filing Date:
May 14, 2018
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G06F11/36; G06F8/41
Attorney, Agent or Firm:
Ken Ieiri