Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE METHOD THEREFOR
Document Type and Number:
Japanese Patent JP2017059291
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a signal processing circuit whose consumption power can be suppressed without requiring a complicated manufacturing process, especially a signal processing circuit whose consumption power can be suppressed by stopping power supply for a short time.SOLUTION: A signal processing circuit includes a control device, an arithmetic device, and a buffer storage device. The buffer storage device stores data sent from a main storage device or from the arithmetic device in accordance with an instruction from the control device. The buffer storage device includes a plurality of memory cells. The memory cell includes a transistor including an oxide semiconductor in a channel formation region, and a storage element to which charges whose amount has been determined by the value of the data are supplied via the transistor.SELECTED DRAWING: Figure 1
Inventors:
KUROKAWA YOSHIMOTO
Application Number:
JP2016205603A
Publication Date:
March 23, 2017
Filing Date:
October 20, 2016
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
G11C14/00; G11C11/401; G11C11/405; H01L21/28; H01L21/336; H01L21/363; H01L21/8234; H01L21/8242; H01L27/088; H01L27/10; H01L27/108; H01L27/115; H01L29/417; H01L29/423; H01L29/49; H01L29/786; H01L29/788; H01L29/792
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JP2010141230A | 2010-06-24 | |||
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Foreign References:
US20090142887A1 | 2009-06-04 | |||
US20100148171A1 | 2010-06-17 |