Title:
半導体装置
Document Type and Number:
Japanese Patent JP7274536
Kind Code:
B2
Abstract:
A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.
Inventors:
Atsushi Umezaki
Hajime Kimura
Hajime Kimura
Application Number:
JP2021121547A
Publication Date:
May 16, 2023
Filing Date:
July 26, 2021
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G11C19/28; G09G3/20; G09G3/36; H03K19/0175; H03K19/096
Domestic Patent References:
JP2004246358A | ||||
JP200478172A | ||||
JP2008107807A | ||||
JP200550502A | ||||
JP2004103226A |
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