Title:
半導体装置
Document Type and Number:
Japanese Patent JP7429686
Kind Code:
B2
Abstract:
A novel semiconductor device is provided. The semiconductor device includes a driver circuit including a plurality of transistors using a silicon substrate for channels, and a first transistor layer and a second transistor layer including a plurality of transistors using a metal oxide for channels. The first transistor layer and the second transistor layer are provided over the silicon substrate layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The first transistor is electrically connected to a first local bit line. The second transistor layer includes a second transistor whose gate is electrically connected to the first local bit line and a first correction circuit electrically connected to the second transistor. The first correction circuit is electrically connected to a first global bit line. The first correction circuit has a function of holding a voltage corresponding to a threshold voltage of the second transistor in the gate of the second transistor.
Inventors:
Seiya Saito
Hiroto Yakubo
Tatsuya Onuki
Shuhei Nagatsuka
Hiroto Yakubo
Tatsuya Onuki
Shuhei Nagatsuka
Application Number:
JP2021510571A
Publication Date:
February 08, 2024
Filing Date:
March 16, 2020
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G11C7/12; G11C5/02; G11C7/06; G11C11/4091; H01L29/786; H10B12/00
Domestic Patent References:
| JP201055730A |
Foreign References:
| WO2019003045A1 | ||||
| WO2017055967A1 |