半導体装置 - 株式会社デンソー

Title:

半導体装置

Document Type and Number:

Japanese Patent JP7459694

Kind Code:

B2

Abstract:

To provide a semiconductor device capable of sufficiently reducing a recovery loss.SOLUTION: A semiconductor device in which an IGBT region 1a having an IGBT element and an FWD region 1b having an FWD element are formed on a common semiconductor substrate 10, comprises a boundary region 1c between the IGBT region 1a and the FWD region 1b. At a part located between a base layer 12 and a drift layer 11 in the boundary region 1c, is formed a hole stopper layer 13 of a first conductivity type whose impurity concentration is higher than that of the drift layer 11.SELECTED DRAWING: Figure 2

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Inventors:

Hiroto Sugiura
Sumitomo Masakiyo
Shigeki Takahashi
Koichi Murakawa
Masayuki Nishihata
Tatsuya Naito

Application Number:

JP2020117876A

Publication Date:

April 02, 2024

Filing Date:

July 08, 2020

Export Citation:

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Assignee:

株式会社デンソー
富士電機株式会社

International Classes:

H01L21/76; H01L21/8234; H01L27/06; H01L27/088; H01L29/739; H01L29/78; H01L29/872

Domestic Patent References:

JP2018073911A
JP2012129504A
JP2019016765A
JP2016162897A
JP2018190948A

Foreign References:

WO2017141998A1
WO2019116748A1
WO2018030444A1

Attorney, Agent or Firm:

Patent Attorney Corporation Yuuai Patent Office

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