Title:
半導体メモリ
Document Type and Number:
Japanese Patent JP7400071
Kind Code:
B2
Abstract:
A semiconductor memory includes a first memory cell configured to be set with a first threshold voltage, the first threshold voltage being one of different threshold voltage levels, a second memory cell configured to be set with a second threshold voltage, the second threshold voltage being one of different threshold voltage levels, a first word line coupled to the first memory cell, a second word line coupled to the second memory cell, and a controller configured to read data of one of different bits based on a combination of the first threshold voltage of the first memory cell and the second threshold voltage of the second memory cell.
Inventors:
Noboru Shibata
Hironori Uchikawa
Taira Shibuya
Hironori Uchikawa
Taira Shibuya
Application Number:
JP2022210267A
Publication Date:
December 18, 2023
Filing Date:
December 27, 2022
Export Citation:
Assignee:
Kioxia Corporation
International Classes:
G11C11/56
Domestic Patent References:
| JP2017224370A | ||||
| JP2007207409A | ||||
| JP2006309928A |
Attorney, Agent or Firm:
Patent Attorney Corporation Suzue Patent General Office