Title:
Silicon nitride substrate and silicon nitride circuit board using it
Document Type and Number:
Japanese Patent JP6293772
Kind Code:
B2
Abstract:
The invention is characterized in that, in a silicon nitride substrate comprising a grain boundary phase with silicon nitride crystal particles and having a heat conductivity of 50W/m·K or greater, the sectional structure of the silicon nitride substrate has a ratio (T2/T1) of 0.01 to 0.30 between the thickness T1 of the silicon nitride substrate and the total length T2 of the grain boundary phase in the thickness direction, and a variation in the dielectric strength of 15% or less from the mean value, as measured by the four terminal method, in which electrodes are brought into contact with the front and the back of the substrate. In addition, a dielectric strength mean value of 15 kv/mm or greater is desirable. According to this constitution, the silicon nitride substrate having a small dielectric strength variation, and the silicon nitride circuit substrate using the same, are obtained.
Inventors:
Noritaka Nakayama
Katsuyuki Aoki
Takashi Sano
Katsuyuki Aoki
Takashi Sano
Application Number:
JP2015543852A
Publication Date:
March 14, 2018
Filing Date:
October 21, 2014
Export Citation:
Assignee:
Toshiba Corporation
Toshiba Materials Co., Ltd.
Toshiba Materials Co., Ltd.
International Classes:
C04B35/587; H01L23/13; H01L23/15; H05K1/03
Domestic Patent References:
| JP2002201075A | ||||
| JP2001335359A | ||||
| JP2013203633A | ||||
| JP9069594A | ||||
| JP2008239420A |
Foreign References:
| WO2010002001A1 |
Attorney, Agent or Firm:
Patent business corporation Tokyo International Patent Office
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