PURPOSE: To enhance the speed and reliability of time slot control by using two processors for communication controller and two time slot controllers to duplex time slot control and by sending and receiving an exclusive control signal between two time slot controllers.

CONSTITUTION: When, in the initial state, the communication control program of #0 system issues a line allocation instruction for allocating line address 5 to time slot (TS) 1, TS allocating circuit 18 of #0 system checks for the E flag for TS1 of TS management table 19. Since the E flag is not 1, the communication control program issues an exclusive control signal so as to set the specified line address at TS1 and so as not to use TS1 for the TS control section 12 of #1 system. When, in the initial state, an allocation instruction for allocating line address 7 to the communication control program TS3 of #1 system is issued, the line address 7 is allocated to TS3. When the processor of #1 system issues an allocation instruction for allocating line address 2 to TS1, the controller 12 checks TS1 for E flag to inhibit the use of TS1.