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Title:
超伝導集積回路及びその作製方法
Document Type and Number:
Japanese Patent JP4711249
Kind Code:
B2
Abstract:
A superconducting integrated circuit includes a substrate(1), a multilayer structure formed on the substrate and composed of a lower superconducting electrode(3), a tunnel barrier(5) and an upper superconducting electrode(4) sequentially joined together upward in the order mentioned, and an insulating layer(6) perforated to form via holes(7a, 7b) to get electrical contacts(8) with the lower and upper electrodes. The insulating layer is formed of a high-resolution, photosensitive, solvent-soluble, organic insulating material. The superconducting integrated circuit is produced by a method that includes the steps of depositing the multiplayer on the substrate, applying the insulating material to the front surface of the substrate inclusive of the multiplayer, forming the via holes in the insulating material by the lithographic technique at the prospective positions to get electrical contacts with the upper and lower electrodes, and laying wirings for connecting the upper and lower electrodes through the via holes.

Inventors:
Masahiro Aoyagi
Hiroshi Nakagawa
Kazuhiko Tokoro
Katsuya Kikuchi
Hiroshi Itaya
Shigemasa Segawa
Application Number:
JP2002375882A
Publication Date:
June 29, 2011
Filing Date:
December 26, 2002
Export Citation:
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Assignee:
National Institute of Advanced Industrial Science and Technology
PI Technology Research Institute Co., Ltd.
International Classes:
H01L39/00; H01L21/312; H01L21/3205; H01L21/768; H01L23/52; H01L23/522; H01L27/18; H01L39/22; H01L39/24
Domestic Patent References:
JP2002122990A
JP2001337453A
JP10207060A
JP8227154A
JP6224477A
JP6196764A
Attorney, Agent or Firm:
Kenzo Fukuda
Shinichi Fukuda
Takemichi Fukuda
Kyosuke Kato