Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0621228
Kind Code:
A
Abstract:

PURPOSE: To lower the voltage to be applied for blowing fuses in an integrated circuit by forming a high-melting-point metal silicide layer where parasitic resistors may appear.

CONSTITUTION: A semiconductor fuse element in an integrated circuit has a polysilicon film 2, an N+ type polysilicon 3, an N-type polysilicon fuse 4, a silicon oxide film 5 and aluminum wirings 6, 7 on a silicon substrate 1. In this case, a titanium silicide layer 8 of compound of high-melting-point metal titanium and the N+ type polysilicon is formed on the polysilicon 3. The layer 8 has a sheet resistance value of about 3Ω, about 1/10 of that of the polysilicon 3, and hence a voltage drop of the polysilicon 3 can be suppressed as much as possible even if a pattern is miniaturized in the case of high integration, and a voltage necessary in the case of melting the fuse can be lowered.


Inventors:
KOIKE RYOICHI
Application Number:
JP17411092A
Publication Date:
January 28, 1994
Filing Date:
July 01, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SEIKO EPSON CORP
International Classes:
H01L21/82; H01L21/822; H01L27/04; (IPC1-7): H01L21/82; H01L27/04
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)