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Patent Searching and Data


Title:
CRC ARITHMETIC CIRCUIT
Document Type and Number:
Japanese Patent JPH0637737
Kind Code:
A
Abstract:

PURPOSE: To allow the circuit to cope with revision of a generation polynomial on its occurrence without need of large scale revision of the circuit.

CONSTITUTION: The circuit is provided with an n-stage holding circuit 1 holding the arithmetic result when a highest degree of a generation polynomial used for a redundancy code check (CRC) arithmetic is up to n-th degree, a recursive code selection circuit 2 selecting and outputting a recursive code among outputs of the n-stage holding circuit 1 according to the input of coefficients for the generation polynomial, an exclusive OR circuit 13 taking exclusive OR between a binary information input being an arithmetic object and the recursive code and outputting the OR output to a 1st stage holding circuit, OR circuit 4-5 ORing the output of the exclusive OR circuit 13 and each coefficient input of the generation polynomial whose output is fed to the exclusive OR circuit of the n-stage holding circuit 1.


Inventors:
YAMASHITA HIROSHI
KOJIMA TOSHIYUKI
Application Number:
JP18774892A
Publication Date:
February 10, 1994
Filing Date:
July 15, 1992
Export Citation:
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Assignee:
NEC CORP
MIYAGI NIPPON DENKI KK
International Classes:
G06F11/10; H03M13/00; H04L1/00; (IPC1-7): H04L1/00; G06F11/10; H03M13/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)