Title:
TRAY
Document Type and Number:
Japanese Patent JP2023165751
Kind Code:
A
Abstract:
To provide a technique that can place a semiconductor substrate in the correct position with respect to an edge ring.SOLUTION: A tray according to the present disclosure on which a semiconductor substrate is placed includes a substrate placement portion on which a semiconductor substrate is placed, and an edge ring placement portion that is provided around the substrate placement portion and on which an edge ring is placed. The substrate placement portion and the edge ring placement portion include a conductive tray body, and a dielectric film formed on at least the top surface of the tray body.SELECTED DRAWING: Figure 3
Inventors:
MOYAMA KAZUKI
NAGASEKI KAZUYA
NAGASEKI KAZUYA
Application Number:
JP2023146702A
Publication Date:
November 17, 2023
Filing Date:
September 11, 2023
Export Citation:
Assignee:
TOKYO ELECTRON LTD
International Classes:
H01L21/673; C23C16/458; C23C16/505; H01L21/3065
Attorney, Agent or Firm:
Sakai International Patent Office