Title:
A wiring board and a manufacturing method for the same
Document Type and Number:
Japanese Patent JP6057641
Kind Code:
B2
Abstract:
A wiring substrate includes a first insulating layer, an adhesion insulating layer formed under the first insulating layer and an outer face of the adhesion insulating layer is made to a roughened face, a first wiring layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer, and in which a first via hole reaching the first wiring layer is provided, a second wiring layer formed on the second insulating layer, and connected to the first wiring layer through the first via hole, a second via hole formed in the adhesion insulating layer and the first insulating layer, and reaching the first wiring layer, and a third wiring layer formed on the outer face of the adhesion insulating layer, and connected to the first wiring layer through the second via hole.
Inventors:
Kazuhiro Kobayashi
Kotaro Kotani
Junichi Nakamura
Kentaro Kaneko
Kotaro Kotani
Junichi Nakamura
Kentaro Kaneko
Application Number:
JP2012206743A
Publication Date:
January 11, 2017
Filing Date:
September 20, 2012
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H05K3/46
Domestic Patent References:
JP2008300482A | ||||
JP2010135477A |
Attorney, Agent or Firm:
Keizo Okamoto
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