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Title:
2-D MATERIAL-BASED NANOMECHANICAL DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/125065
Kind Code:
A1
Abstract:
An apparatus is provided which comprises: a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material, a first conductive region cantilevered into the void from a surface of the substrate and spaced apart from the beam, and first and second gate electrodes disposed adjacent the surface of the substrate and spaced apart on opposite sides of the first conductive region. Other embodiments are also disclosed and claimed.

Inventors:
PAWASHE CHYTRA (US)
THEOFANIS PATRICK (US)
CAUDILLO ROMAN (US)
TORRES JESSICA (US)
Application Number:
PCT/US2016/068764
Publication Date:
July 05, 2018
Filing Date:
December 27, 2016
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
INTEL CORP (US)
International Classes:
H01L29/06; H01L21/02; H01L21/8238; H01L27/06; H01L27/115; H01L29/16
Foreign References:
US20160329438A12016-11-10
US20150180372A12015-06-25
US20110067982A12011-03-24
US20100012471A12010-01-21
US20130313943A12013-11-28
Attorney, Agent or Firm:
GUGLIELMI, David, L. (US)
Download PDF:
Claims:
CLAIMS

We claim:

1. An apparatus comprising:

a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material;

a first conductive region cantilevered into the void from a surface and spaced apart from the beam; and

first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the first conductive region.

2. The apparatus of claim 1, wherein the beam further comprises semiconductor material coupled with the 2-D material.

3. The apparatus of claim 2, wherein the beam further comprises multiple atomic thick layers of 2-D material.

4. The apparatus of claim 1, wherein the void comprises a vacuum, is filled with a gas, or is filled with a liquid.

5. The apparatus according to any one of claims 1 to 4, wherein the 2-D material comprises graphene.

6. The apparatus according to any one of claims 1 to 4, wherein the gate electrodes to

produce an electrostatic force upon the beam to bring the 2-D material into conductive contact with the first conductive region.

7. A nanorelay switch comprising:

a beam disposed in a void disposed above a substrate, the beam having an anchored portion at one end, wherein the beam comprises an atomic thick layer of graphene;

a drain region adjacent to the anchored portion and conductively coupled with the graphene; a source region cantilevered into the void from a surface and spaced apart from the beam; and

a gate electrode disposed adjacent the surface and spaced apart from the source region.

8. The nanorelay switch of claim 7, further comprising wherein the beam is oriented non- parallel to the substrate.

9. The nanorelay switch of claim 7, further comprising a second anchored portion of the beam at an opposite end and a second drain region adjacent to the second anchored portion.

10. The nanorelay switch of claim 7, wherein the beam further comprises semiconductor material.

11. The nanorelay switch according to any one of claims 7 to 10, wherein the drain region comprises tungsten.

12. The nanorelay switch according to any one of claims 7 to 10, wherein source region comprises graphene or graphite.

13. A nanorelay switch comprising:

a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of graphene;

a source region cantilevered into the void from a surface and spaced apart from the beam;

a drain region cantilevered into the void from the surface and spaced apart from the beam and the source region; and

first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the source and drain regions.

14. The nanorelay switch of claim 13, wherein the beam further comprises semiconductor material.

15. The nanorelay switch of claim 14, wherein the beam further comprises insulator material between the graphene and the semiconductor material.

16. The nanorelay switch of claim 13, wherein the graphene comprises a length substantially coextensive with a distance between the gate electrodes.

17. The nanorelay switch of any of claims 13 to 16, wherein the source and drain regions comprise graphene or graphite.

18. The nanorelay switch of any of claims 13 to 16, wherein the beam further comprises multiple atomic thick layers of graphene.

19. A non-volatile memory (NVM) device comprising:

a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2- D material;

a bit region cantilevered into the void from a surface and spaced apart from the beam; and

first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the bit region; and

a third gate electrode disposed within the substrate on an opposite side of the beam from the bit region.

20. The NVM device of claim 19, wherein the void is hermetically sealed.

21. The NVM device of claim 19, wherein the 2-D material comprises graphene.

22. The NVM device of claim 21 , wherein the graphene comprises graphene formed on a copper or nickel foil and transferred to the substrate.

23. The NVM device of any of claims 19 to 22, wherein the beam further comprises multiple atomic thick layers of graphene.

24. The NVM device of claim 23, wherein the beam comprises between about 3 and 6 atomic layers of graphene.

25. The NVM device of any of claims 19 to 22, wherein the bit region comprises tungsten.

Description:
2-D MATERIAL-BASED NANOMECHANICAL DEVICE

BACKGROUND

[0001] There has been much work done in recent years in the area of mechanical switching devices, specifically devices with a nano-mechanical structure that can be moved using electrostatic forces, and may be brought into and out of contact with a conductive surface. These devices may be able to replace CMOS switching devices in some applications, because of their potential for very low energy consumption, for example low switching energy, low leakage and steep subthreshold slope. Examples of such devices can be seen in U.S. Patent # 9,362,074, issued June 7, 2016, entitled, "NANO WIRE-BASED

MECHANICAL SWITCHING DEVICE." While these mechanical switching devices might not be able to switch as quickly as CMOS devices, further advances in design to lower energy consumption could lead to adoption in ultra-low energy applications.

BRIEF DESCRIPTION OF THE DRAWINGS

[0002] The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure, which, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only.

[0003] Fig. 1 illustrates a 2-D material formation, according to some embodiments,

[0004] Figs. 2A-2B illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments,

[0005] Figs. 3Α-3Β illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments,

[0006] Figs. 4A-4B illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments,

[0007] Figs. 5A-5D illustrate a cross-sectional view of a 2-D material-based nonvolatile memory (NVM) device, according to some embodiments,

[0008] Fig. 6 illustrates a flowchart of a method of forming a 2-D material-based nanomechanical device, in accordance with some embodiments, and

[0009] Fig. 7 illustrates a smart device or a computer system or a SoC (System-on-

Chip) which includes a 2-D material-based nanomechanical device, according to some embodiments. DETAILED DESCRIPTION

[0010] 2-D material-based nanomechanical devices are generally presented. In this regard, embodiments of the present invention enable switching devices with monolayers of conductive material for reduced size and energy. One skilled in the art would appreciate that these nanomechanical devices, that are constructed with graphene, for example, may have significant operational advantages over previous approaches, such as lower energy due to low interfacial adhesion, higher drive current due to relatively low contact resistance, and thus result in lower switching delay.

[0011] In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent, however, to one skilled in the art, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.

[0012] Note that in the corresponding drawings of the embodiments, signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.

[0013] Throughout the specification, and in the claims, the term "connected" means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices. The term "coupled" means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices. The term "circuit" or "module" may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on." [0014] Unless otherwise specified the use of the ordinal adjectives "first," "second," and "third," etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner.

[0015] For the purposes of the present disclosure, phrases "A and/or B" and "A or B" mean (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and/or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C). The terms "left," "right," "front," "back," "top," "bottom," "over," "under," and the like in the

description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.

[0016] Fig. 1 illustrates a 2-D material formation, according to some embodiments.

As shown, formation 100 includes metal foil 102, precursor molecule 104, disassociated atom 106, reaction byproducts 108 and 2-D material 110. In some embodiments, formation 100 represents a chemical vapour deposition (CVD) process. Formation 100 may take place in a reaction chamber where metal foil 102 has been heated. When precursor molecule 104 comes in contact with metal foil 102 a reaction occurs that splits precursor molecule 104 (for example, methane) into disassociated atom 106 (for example, carbon) and reaction byproducts 108 (for example, hydrogen gas). Disassociated atom 106 may then join the lattice structure of 2-D material 110, creating an atomic-thick material film on metal foil 102. In some embodiments, 2-D material 110 may be transferred as part of a nanomechanical device manufacture as described in more detail hereinafter. In other embodiments, 2-D material 110 may be formed on a substrate of a nanomechanical device, without the need to transfer 2-D material 110.

[0017] In some embodiments, 2-D material 110 is graphene, while in other embodiments other materials, such as germanene, molybdenium disculfide, or other monolayers, such as transition metal dichalcogenide monolayers, may be utilized. In some embodiments, metal foil 102 is copper, while in other embodiments nickel or other metals may be used. While shown as a monolayer, additional layers of 2-D material 110 may be formed on the surface of metal foil 102, thereby creating a material film of multiple atomic layers thick. While additional layers of 2-D material 110 may increase the energy needed to generate sufficient electrostatic force for a nanomechanical switch, there may be benefits in terms of additional stiffness and spring restoring force. In some embodiments, a suitable thickness for 2-D material 110 is between about 3 and 6 atomic layers. [0018] Figs. 2A-2B illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments. As shown, switch 200 includes beam 202, substrate 204, void 206, body 208, source 210, contact 212, gates 214 and drains 216. While shown as including two drains 216 and two gates 214, in some embodiments, switch 200 may include just one, or more than two, drains 216 and gates 214.

[0019] In some embodiments, beam 202 includes 2-D material transferred from a

CVD thin film growth on a metal foil. In some embodiments, beam 202 includes 2-D material grown on substrate 204. In some embodiments, beam 202 is a one atom thick monolayer of graphene or other 2-D material, while in other embodiments, beam 202 is multiple atoms thick layers of graphene or other 2-D material. Beam 202 may be anchored at both ends between drains 216 and substrate 204. In some embodiments, drains 216 comprise tungsten coupled with beam 202, while drains 216 may include additional and/or alternative materials. Substrate 204, may be made of semiconductor material such as silicon, and may have material removed by etching, mechanical or laser means to create void 206. In some embodiments, void 206 is enclosed by body 208, which may be semiconductor or dielectric material. In some embodiments, void 206 may be a vacuum, filled with a gas, or filled with a liquid.

[0020] In some embodiments, source 210 may be cantilevered into void 206. In other embodiments, source 210 might not protrude into void 206. In some embodiments, source 210 is copper with a different material as contact 212. In some embodiments, contact 212 is graphene or graphite to provide low adhesion with beam 202. When a voltage is applied to gates 214, which may be flush with, recessed from, or extending beyond a surface of body 208 adjacent void 206, an electrostatic force may be generated that brings beam 202 into contact with contact 212. In this "on" state (as shown in Fig. 2B), an electrical connection is established between source 210 and drains 216. When the voltage is removed from gates 214, the internal spring force of beam 202 overcomes the adhesion forces between beam 202 and contact 212, separating the connection and returning switch 200 to an "off state (as shown in Fig. 2A).

[0021] Figs. 3A-3B illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments. As shown, switch 300 includes beam 302, substrate 304, void 306, 2-D material 308, support 310, source 312, contact 314, gate 316 and drain 318. [0022] In some embodiments, beam 302 includes 2-D material 308 on support 310, which may be semiconductor or other material to provide additional stiffness or stability. In some embodiments, 2-D material 308 is a one atom thick monolayer of graphene or other 2-D material, while in other embodiments, 2-D material 308 is multiple atoms thick layers of graphene or other 2-D material. Beam 302 may be anchored at one end between drain 318 and substrate 304. In some embodiments, beam 302 is non-parallel to substrate 304, while other design variations can also be implemented as embodiments of the present invention. In some embodiments, drain 318 comprises tungsten coupled with beam 302, while drain 318 may include additional and/or alternative materials. Substrate 304, may be made of semiconductor material such as silicon, and may have material removed by etching, mechanical or laser means to create void 306. In some embodiments, void 306 may be a vacuum, filled with a gas, or filled with a liquid.

[0023] In some embodiments, source 312 may be cantilevered into void 306. In other embodiments, source 312 might not protrude into void 306. In some embodiments, source 312 is copper with a different material as contact 314. In some embodiments, contact 314 is graphene or graphite to provide low adhesion with 2-D material 308. When a voltage is applied to gate 316, which may be flush with, recessed from, or extending beyond a surface adjacent void 306, an electrostatic force may be generated that brings 2-D material 308 into contact with contact 314. In this "on" state (as shown in Fig. 3B), an electrical connection is established between source 312 and drain 318. When the voltage is removed from gate 316, the internal spring force of beam 302 overcomes the adhesion forces between 2-D material 308 and contact 314, separating the connection and returning switch 300 to an "off state (as shown in Fig. 3A).

[0024] Figs. 4A-4B illustrate a cross-sectional view of a 2-D material-based nanorelay switch, according to some embodiments. As shown, switch 400 includes beam 402, substrate 404, void 406, 2-D material 408, insulator 410, source 412, source contact 413, drain 414, drain contact 415, and gates 416.

[0025] In some embodiments, beam 402 includes 2-D material 408 and insulator 410, such as dielectric material for example, coupled with a central portion of beam 402. In some embodiments, 2-D material 408 comprises a length substantially coextensive with a distance between gates 416, though other lengths for 2-D material 408 may be utilized. In some embodiments, 2-D material 408 is a one atom thick monolayer of graphene or other 2-D material, while in other embodiments, 2-D material 408 is multiple atoms thick layers of graphene or other 2-D material. Beam 402 may be anchored at both ends and may be made of semiconductor or other material. Substrate 404, may be made of semiconductor material such as silicon, and may have material removed by etching, mechanical or laser means to create void 406. In some embodiments, void 406 may be a vacuum, filled with a gas, or filled with a liquid.

[0026] In some embodiments, source 412 and drain 414 may be cantilevered into void

406. In other embodiments, source 412 and drain 414 might not protrude into void 406. In some embodiments, source 412 and drain 414 are copper with a different material as source contact 413 and drain contact 415. In some embodiments, source contact 413 and drain contact 415 are graphene or graphite to provide low adhesion with 2-D material 408. When a voltage is applied to gates 416, which may be flush with, recessed from, or extending beyond a surface adjacent void 406, an electrostatic force may be generated that brings 2-D material 408 into contact with source contact 413 and drain contact 415. In this "on" state (as shown in Fig. 4B), an electrical connection is established between source 412 and drain 414. When the voltage is removed from gates 416, the internal spring force of beam 402 overcomes the adhesion forces between 2-D material 408 and contacts 413 and 415, separating the connection and returning switch 400 to an "off state (as shown in Fig. 4A).

[0027] Figs. 5A-5D illustrate a cross-sectional view of a 2-D material-based nonvolatile memory (NVM) device, according to some embodiments. As shown, device 500 includes beam 502, substrate 504, void 506, bit 508, contact 510, set gates 512, voltage supply 514 and reset gate 516. While shown as including two set gates 512 and two voltage supplies 514, in some embodiments, device 500 may include just one, or more than two, set gates 512 and voltage supplies 514.

[0028] In some embodiments, beam 502 includes 2-D material transferred from a

CVD thin film growth on a metal foil. In some embodiments, beam 502 includes 2-D material grown on substrate 504. In some embodiments, beam 502 is a one atom thick monolayer of graphene or other 2-D material, while in other embodiments, beam 502 is multiple (for example between about 3 and 6) atoms thick layers of graphene or other 2-D material. Beam 502 may be anchored at both ends between voltage supply 514 and substrate 504. In some embodiments, voltage supply 514 comprise tungsten coupled with beam 502, while voltage supply 514 may include additional and/or alternative materials. Substrate 504, may be made of semiconductor material such as silicon, and may have material removed by etching, mechanical or laser means to create void 506. In some embodiments, void 506 may be a vacuum, filled with a gas, or filled with a liquid. In some embodiments void 506 is hermetically sealed.

[0029] In some embodiments, bit 508 may be cantilevered into void 506. In other embodiments, bit 508 might not protrude into void 506. In some embodiments, bit 508 is copper with a different material as contact 510. In some embodiments, contact 510 is tungsten to provide high adhesion with beam 502. When a voltage is applied to set gates 512, which may be flush with, recessed from, or extending beyond a surface adjacent void 506, an electrostatic force may be generated that brings beam 502 into contact with contact 510. In this "bit set" state (as shown in Fig. 5B), an electrical connection is established between bit 508 and voltage supply 514. When the voltage is removed from set gates 512, the internal spring force of beam 502 may not be sufficient to overcome the adhesion forces between beam 502 and contact 510, which is designed to be high, thereby maintaining the "bit set" state as shown in Fig. 5C). When a voltage is applied to reset gate 516, which may be flush with, recessed below, or extending beyond a surface of substrate 504, an electrostatic force may be generated that separates the connection between beam 502 and contact 510 (as shown in Fig 5D), returning device 500 to an "off state. When the voltage is removed from reset gate 516 internal spring forces may return beam 502 to the state as shown in Fig. 5 A.

[0030] Fig. 6 illustrates a flowchart of a method of forming a 2-D material-based nanomechanical device, in accordance with some embodiments. Although the blocks in the flowchart with reference to Fig. 6 are shown in a particular order, the order of the actions can be modified. Thus, the illustrated embodiments can be performed in a different order, and some actions/blocks may be performed in parallel. Some of the blocks and/or operations listed in Fig. 6 are optional in accordance with certain embodiments. The numbering of the blocks presented is for the sake of clarity and is not intended to prescribe an order of operations in which the various blocks must occur. Additionally, operations from the various flows may be utilized in a variety of combinations.

[0031] Method 600 begins with forming (602) 2-D material 1 10. In some

embodiments, CVD is performed to create monolayer thin film (such as 2-D material 110) on a metal foil. Next, a substrate (such as 204, 304, 404 or 504) is prepared (604). In some embodiments, one or more conductive contacts (such as reset gate 516) are formed within the substrate.

[0032] Then, a beam (such as 202, 302, 402 or 502) is created (606) over the substrate. In some embodiments, the beam is a combination of 2-D material and other materials. The beam may be anchored by substrate material, possibly in combination with conductive contacts, on one or more ends. Next, a void (such as 206, 306, 406 or 506) is created (608) in the substrate. In some embodiments, chemical etch is used to remove substrate material and create the void.

[0033] The method continues with creating (610) cantilevered contact(s) (such as

210, 312, 412, 414 or 508). In some embodiments, the cantilevered contacts are combined with additional material to achieve a desired interfacial adhesion. Next, gate electrodes (such as 214, 316, 416 or 512) are created (612) adjacent a void. Finally, conventional back-end processing (614) is performed to, for example, create interconnects and device packaging.

[0034] Fig. 7 illustrates a smart device or a computer system or a SoC (System-on-

Chip) 2100 which includes a 2-D material-based nanomechanical device, according to some embodiments. In some embodiments, computing device 700 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e- reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 700. In some embodiments, one or more components of computing device 700, for example processor 710 and/or memory subsystem 760, include 2-D material-based nanomechanical devices as described above.

[0035] For purposes of the embodiments, the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals. The transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors— BJT PNP/NPN, BiCMOS, CMOS, etc., may be used without departing from the scope of the disclosure.

[0036] In some embodiments, computing device 700 includes a first processor 710.

The various embodiments of the present disclosure may also comprise a network interface within 770 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.

[0037] In one embodiment, processor 710 can include one or more physical devices, such as microprocessors, application processors, microcontrollers, programmable logic devices, or other processing means. The processing operations performed by processor 710 include the execution of an operating platform or operating system on which applications and/or device functions are executed. The processing operations include operations related to I/O (input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 700 to another device. The processing operations may also include operations related to audio I/O and/or display I/O.

[0038] In one embodiment, computing device 700 includes audio subsystem 720, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 700, or connected to the computing device 700. In one embodiment, a user interacts with the computing device 700 by providing audio commands that are received and processed by processor 710.

[0039] Display subsystem 730 represents hardware (e.g., display devices) and software (e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 700. Display subsystem 730 includes display interface 732, which includes the particular screen or hardware device used to provide a display to a user. In one embodiment, display interface 732 includes logic separate from processor 710 to perform at least some processing related to the display. In one embodiment, display subsystem 730 includes a touch screen (or touch pad) device that provides both output and input to a user.

[0040] I/O controller 740 represents hardware devices and software components related to interaction with a user. I/O controller 740 is operable to manage hardware that is part of audio subsystem 720 and/or display subsystem 730. Additionally, I/O controller 740 illustrates a connection point for additional devices that connect to computing device 700 through which a user might interact with the system. For example, devices that can be attached to the computing device 700 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other I/O devices for use with specific applications such as card readers or other devices.

[0041] As mentioned above, I/O controller 740 can interact with audio subsystem 720 and/or display subsystem 730. For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 700. Additionally, audio output can be provided instead of, or in addition to display output. In another example, if display subsystem 730 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by I/O controller 740. There can also be additional buttons or switches on the computing device 700 to provide I/O functions managed by I/O controller 740.

[0042] In one embodiment, I/O controller 740 manages devices such as

accelerometers, cameras, light sensors or other environmental sensors, or other hardware that can be included in the computing device 700. The input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features).

[0043] In one embodiment, computing device 700 includes power management 750 that manages battery power usage, charging of the battery, and features related to power saving operation. Memory subsystem 760 includes memory devices for storing information in computing device 700. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 760 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 700.

[0044] Elements of embodiments are also provided as a machine-readable medium

(e.g., memory 760) for storing the computer-executable instructions. The machine-readable medium (e.g., memory 760) may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer-executable instructions. For example, embodiments of the disclosure may be downloaded as a computer program (e.g., BIOS) which may be transferred from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals via a communication link (e.g., a modem or network connection).

[0045] Connectivity 770 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 700 to communicate with external devices. The computing device 700 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.

[0046] Connectivity 770 can include multiple different types of connectivity. To generalize, the computing device 700 is illustrated with cellular connectivity 772 and wireless connectivity 774. Cellular connectivity 772 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards. Wireless connectivity (or wireless interface) 774 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.

[0047] Peripheral connections 780 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections. It will be understood that the computing device 700 could both be a peripheral device ("to" 782) to other computing devices, as well as have peripheral devices ("from" 784) connected to it. The computing device 700 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 700. Additionally, a docking connector can allow computing device 700 to connect to certain peripherals that allow the computing device 700 to control content output, for example, to audiovisual or other systems.

[0048] In addition to a proprietary docking connector or other proprietary connection hardware, the computing device 700 can make peripheral connections 780 via common or standards-based connectors. Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types. [0049] Reference in the specification to "an embodiment," "one embodiment," "some embodiments," or "other embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments. The various appearances of "an embodiment," "one embodiment," or "some embodiments" are not necessarily all referring to the same embodiments. If the specification states a component, feature, structure, or characteristic "may," "might," or "could" be included, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to "a" or "an" element, that does not mean there is only one of the elements. If the specification or claims refer to "an additional" element, that does not preclude there being more than one of the additional element.

[0050] Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment anywhere the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive

[0051] While the disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.

[0052] In addition, well known power/ground connections to integrated circuit (IC) chips and other components may or may not be shown within the presented figures, for simplicity of illustration and discussion, and so as not to obscure the disclosure. Further, arrangements may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram arrangements are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. The description is thus to be regarded as illustrative instead of limiting. [0053] The following examples pertain to further embodiments. Specifics in the examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented with respect to a method or process.

[0054] In one example, an apparatus is provided comprising: a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material; a first conductive region cantilevered into the void from a surface and spaced apart from the beam; and first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the first conductive region.

[0055] In some embodiments, the beam further comprises semiconductor material coupled with the 2-D material. In some embodiments, the beam further comprises multiple atomic thick layers of 2-D material. In some embodiments, the void comprises a vacuum, is filled with a gas, or is filled with a liquid. In some embodiments, the 2-D material comprises graphene. In some embodiments, the gate electrodes to produce an electrostatic force upon the beam to bring the 2-D material into conductive contact with the first conductive region.

[0056] In another example, a nanorelay switch is provided comprising: a beam disposed in a void disposed above a substrate, the beam having an anchored portion at one end, wherein the beam comprises an atomic thick layer of graphene; a drain region adjacent to the anchored portion and conductively coupled with the graphene; a source region cantilevered into the void from a surface and spaced apart from the beam; and a gate electrode disposed adjacent the surface and spaced apart from the source region.

[0057] In some embodiments, the beam is oriented non-parallel to the substrate. Some embodiments also include a second anchored portion of the beam at an opposite end and a second drain region adjacent to the second anchored portion. In some embodiments, the beam further comprises semiconductor material. In some embodiments, the drain region comprises tungsten. In some embodiments, source region comprises graphene or graphite.

[0058] In another example, a nanorelay switch is provided comprising: a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of graphene; a source region cantilevered into the void from a surface and spaced apart from the beam; a drain region cantilevered into the void from the surface and spaced apart from the beam and the source region; and first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the source and drain regions. [0059] In some embodiments, the beam further comprises semiconductor material. In some embodiments, the beam further comprises insulator material between the graphene and the semiconductor material. In some embodiments, the graphene comprises a length substantially coextensive with a distance between the gate electrodes. In some embodiments, the source and drain regions comprise graphene or graphite. In some embodiments, the beam further comprises multiple atomic thick layers of graphene.

[0060] In another example, a non-volatile memory (NVM) device is provided comprising: a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material; a bit region cantilevered into the void from a surface and spaced apart from the beam; and first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the bit region; and a third gate electrode disposed within the substrate on an opposite side of the beam from the bit region.

[0061] In some embodiments, the void is hermetically sealed. In some embodiments, the 2-D material comprises graphene. In some embodiments, the graphene comprises graphene formed on a copper or nickel foil and transferred to the substrate. In some embodiments, the beam further comprises multiple atomic thick layers of graphene. In some embodiments, the beam comprises between about 3 and 6 atomic layers of graphene. In some embodiments, the bit region comprises tungsten.

[0062] In another example, a system is provided comprising: a display subsystem; a wireless communication interface; and an integrated circuit device, the integrated circuit device comprising: a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material; a first conductive region cantilevered into the void from a surface and spaced apart from the beam; and first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the first conductive region.

[0063] In some embodiments, the beam further comprises semiconductor material coupled with the 2-D material. In some embodiments, the beam further comprises multiple atomic thick layers of 2-D material. In some embodiments, the void comprises a vacuum, is filled with a gas, or is filled with a liquid. In some embodiments, the 2-D material comprises graphene. In some embodiments, the gate electrodes to produce an electrostatic force upon the beam to bring the 2-D material into conductive contact with the first conductive region. [0064] In another example, a method for forming a nanomechanical device is provided comprising: creating a beam disposed in a void disposed above a substrate, the beam having anchored portions at opposite ends, wherein the beam comprises an atomic thick layer of 2-D material; creating a first conductive region cantilevered into the void from a surface and spaced apart from the beam; and creating first and second gate electrodes disposed adjacent the surface and spaced apart on opposite sides of the first conductive region.

[0065] In some embodiments, creating a beam comprises transferring the 2-D material from a metal foil. In some embodiments, creating a beam comprises growing the 2-D material on the substrate. In some embodiments, the beam further comprises semiconductor material. In some embodiments, the 2-D material comprises graphene. Some embodiments also include filling the void with a gas or liquid.

[0066] An abstract is provided that will allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.