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Title:
ABRADING METHOD FOR SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/1998/022976
Kind Code:
A1
Abstract:
An abrading method having a stable high abrasion efficiency in chemical mechanical polishing of a large scale integrated circuit wafer. To reduce the quantity of use of consumptive members, such as, an abrasive solution and an abrasive pad, an electric field is effected to act on abrasive grains on the abrasive pad so as to suck the abrasive grains into a diffusion layer of an abrasive solvent near the surface of the abrasive pad and hold the abrasive grains in the diffusion layer.

Inventors:
KOJIMA HIROYUKI (JP)
SATO HIDEMI (JP)
OOKAWA TETSUO (JP)
URUSHIBARA MARIKO (JP)
Application Number:
PCT/JP1997/004172
Publication Date:
May 28, 1998
Filing Date:
November 17, 1997
Export Citation:
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Assignee:
HITACHI LTD (JP)
KOJIMA HIROYUKI (JP)
SATO HIDEMI (JP)
OKAWA TETSUO (JP)
URUSHIBARA MARIKO (JP)
International Classes:
B23H5/00; B24B37/04; H01L21/304; B24B1/00; H01L21/306; H01L21/3105; (IPC1-7): H01L21/304; H01L21/321; B24B37/00
Foreign References:
JPH05185357A1993-07-27
JPH04135167A1992-05-08
JPH0553854U1993-07-20
Attorney, Agent or Firm:
Ogawa, Katsuo (5-1, Marunouchi 1-chom, Chiyoda-ku Tokyo 100, JP)
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