ACTIVE MATRIX SUBSTRATE AND MANUFACTURING METHOD THEREOF

WIPO Patent Application WO/2011/086905

A1

The active matrix substrate is provided with multiple pixel electrodes (19a) arranged in a matrix, and multiple TFTs (5a) each connected to a pixel electrode (19a). Each TFT (5a) is provided with a gate electrode (11aa) disposed on an insulating substrate (10a), a gate insulating layer (12) disposed so as to cover the gate electrode (11aa), an oxide semiconductor layer (13a) on the gate insulating layer (12) and having a channel area (C) disposed so as to overlap with the gate electrode (11aa), and a source electrode (16aa) and a drain electrode (16b) disposed on the oxide semiconductor layer (13a) so as to overlap the gate electrode (11aa) and so as to face each other across the channel area (C). A protective insulating layer (17) of a spin-on glass material is provided on the channel area (C) of the oxide semiconductor layer (13a).

HARA TAKESHI
NISHIKI HIROHIKO
OHTA YOSHIFUMI
MIZUNO YUUJI
CHIKAMA YOSHIMASA
AITA TETSUYA
SUZUKI MASAHIKO
TAKEI MICHIKO
NAKAGAWA OKIFUMI
HARUMOTO YOSHIYUKI

PCT/JP2011/000104

July 21, 2011

January 12, 2011

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SHARP KK (JP)
HARA TAKESHI
NISHIKI HIROHIKO
OHTA YOSHIFUMI
MIZUNO YUUJI
CHIKAMA YOSHIMASA
AITA TETSUYA
SUZUKI MASAHIKO
TAKEI MICHIKO
NAKAGAWA OKIFUMI
HARUMOTO YOSHIYUKI

H01L29/786; G02F1/1368; G09F9/30; H01L21/336

EP2141743A1	2010-01-06
JP2009170905A	2009-07-30
JP2005285890A	2005-10-13
US20090155940A1	2009-06-18
JP2006154122A	2006-06-15
JP2009158940A	2009-07-16

MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)

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