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Title:
ACTIVE MATRIX SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2015/122393
Kind Code:
A1
Abstract:
An active matrix substrate (100) has a display region (R1) in which a plurality of pixels are provided, and a frame region (R2) provided around the display region, and is provided with a plurality of peripheral circuit TFTs (5) constituting a drive circuit in the frame region. Each of the plurality of peripheral circuit TFTs has a gate electrode (12), a source electrode (16), a drain electrode (18), and an oxide semiconductor layer (14). In at least some of the plurality of peripheral circuit TFTs, a source connection region (Rs), which is a region in which the oxide semiconductor layer and the source electrode are connected, and a drain connection region (Rd), which is a region in which the oxide semiconductor layer and the drain electrode are connected, are asymmetrically formed.

Inventors:
TOMIDA MASAHIRO
UEDA NAOKI
Application Number:
PCT/JP2015/053588
Publication Date:
August 20, 2015
Filing Date:
February 10, 2015
Export Citation:
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Assignee:
SHARP KK (JP)
International Classes:
H01L29/786; G02F1/1368
Domestic Patent References:
WO2010107027A12010-09-23
Foreign References:
JP2003273364A2003-09-26
JP2003249655A2003-09-05
JP2001313398A2001-11-09
JPH10125933A1998-05-15
JP2006269491A2006-10-05
Attorney, Agent or Firm:
OKUDA SEIJI (JP)
Seiji Okuda (JP)
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