Title:
ADAPTIVE LOW-POWER SIGNALING TO ENABLE LINK SIGNAL ERROR RECOVERY WITHOUT INCREASED LINK CLOCK RATES
Document Type and Number:
WIPO Patent Application WO/2023/159415
Kind Code:
A1
Abstract:
An error recovery method for a display system interface includes configuring a physical layer circuit in the display system interface for a high-speed mode of communication, causing the physical layer circuit to transmit display data over a serial bus while the physical layer circuit is configured for the high-speed mode of communication, halting transmission of the display data when an error indication signal transitions to an active state, configuring the physical layer circuit for a low-power mode of communication after terminating the transmission of the display data, reconfiguring the physical layer circuit for the high-speed mode of communication when the error indication signal transitions to an inactive state, and causing the physical layer circuit to resume the transmission of the display data after reconfiguring the physical layer circuit for the high-speed mode of communication.
Inventors:
ZHANG NAN (US)
HAN LONG (US)
GUO JUNQIANG (US)
HAN LONG (US)
GUO JUNQIANG (US)
Application Number:
PCT/CN2022/077592
Publication Date:
August 31, 2023
Filing Date:
February 24, 2022
Export Citation:
Assignee:
QUALCOMM INC (US)
ZHANG NAN (CN)
HAN LONG (CN)
GUO JUNQIANG (CN)
ZHANG NAN (CN)
HAN LONG (CN)
GUO JUNQIANG (CN)
International Classes:
G06F1/32
Foreign References:
| US10649946B1 | 2020-05-12 | |||
| US20210103547A1 | 2021-04-08 | |||
| CN110347630A | 2019-10-18 | |||
| US20130262892A1 | 2013-10-03 | |||
| CN104123111A | 2014-10-29 | |||
| CN103262462A | 2013-08-21 |
Attorney, Agent or Firm:
NTD PATENT & TRADEMARK AGENCY LTD. (CN)
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