DIGITAL PRE-DISTORTION LOOK-UP TABLE

TECHNICAL FIELD

[0001] The present disclosure relates generally to wireless communications, and more particularly to compensating for nonlinearity of RF transmission power amplifiers using digital pre-distortion.

BACKGROUND

[0002] Radio frequency power amplifiers are known to add distortion to the signal they are designed to amplify. The reason for this is that a power amplifier has a nonlinear input-output signal characteristic. This shows up as a broadened spectrum around the desired amplified, signal, and as an unwanted in-band component of the signal. As a counter-measure to decrease the effects of nonlinearity, it is known to pre-distort the signal at the input of the amplifier as to give a relatively un-distorted amplified signal at the output of the power amplifier. This technique is called pre-distortion. Pre-distortion as implemented today normally uses a look-up table that is used to multiply the signal. Entries in the look-up table correspond to the discretized magnitude of the signal at every time sample. Increasing the number of entries in the look-up table and the number look-up tables may improve the ability of a digital pre-distortion circuit to inversely compensate for complex nonlinearity characteristics of a power amplifier.

[0003] The amount of computer memory and processing resources which are needed to support digital pre-distortion of signals for transmission can become undesirably large for some types of radio communications, such as multiple-input multiple-output (MIMO) systems having multiple transmit antennas and associated amplifiers and signal paths.

SUMMARY

[0004] Some embodiments of the present disclosure are directed to a digital pre-distortion method pre-distorts an input signal for amplification by a power amplifier before transmission through at least one antenna. For a first stage of predistortion, the method processes a discrete amplitude of the input signal through a first set of addressing-look-up tables or first set of address mapping functions for a corresponding first set of data look-up tables (Data-LUTs) to output a set of mapped sampled amplitudes. Each of the Data-LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier. The method multiplies a set of the input signals by a set of complex coefficients from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digitally pre-distorted input signals. The method generates a combined digitally pre-distorted input signal based on combining the intermediate digitally pre-distorted input signals.

[0005] Some other embodiments of the present disclosure are directed to a digital pre-distorter for pre-distorts an input signal for amplification by a power amplifier before transmission through at least one antenna. For a first stage of predistortion, the digital pre-distorter processes a discrete amplitude of the input signal through a first set of addressing-look-up tables or first set of address mapping functions for a corresponding first set of data look-up tables (Data-LUTs) to output a set of mapped sampled amplitudes. Each of the Data-LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier. The digital pre-distorter multiplies a set of the input signals by a set of complex coefficients from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digitally pre-distorted input signals. The digital pre-distorter generates a combined digitally pre-distorted input signal based on combining the intermediate digitally pre-distorted input signals.

[0006] Potential advantages of various embodiments include that using a set of Addr-LUTs or a set of address mapping functions a set of gain functions for each Data-LUT can enable a digital pre-distorter (e.g., which may be implemented in hardware (e.g., digital logic gate circuit (e.g., FPGA)), in software performed by at least one microprocessor, , in a hybrid digital and analog circuit, in an artificial intelligence engine, etc.) to more accurately enhance a process for inversely compensating for complex nonlinear characteristics of a power amplifier, and can enable reduction in the amount of hardware resources (e.g., ASIC, RoS, SoC, memory and/or processing resources) which are needed to support digital pre-distortion of signals for radio communications, such as multiple-input multiple-output (MIMO) systems having multiple transmit antennas and associated amplifiers and signal paths.

[0007] These and further embodiments are described in detail below. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate certain non-limiting embodiments of inventive concepts. In the drawings:

[0009] Figure 1 is a diagram illustrating the spectrum of an output signal amplified by a nonlinear power amplifier;

[0010] Figure 2 is a diagram illustrating the nonlinear power amplifier signal gain characteristic, a predistortion signal gain characteristic configured as an inverse of the nonlinear power amplifier signal gain characteristic, and the combined resulting linear gain;

[0011] Figure 3A is a diagram illustrating a set of addressing-look-up tables (Addr-LUTs) or set of address mapping functions for a corresponding first set of data look-up tables (Data-LUTs) to output a set of mapped sampled amplitudes in accordance with some embodiments of inventive concepts;

[0012] Figure 3B is a diagram illustrating a Data-LUT includes a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier, and which maps individual ones of the possible mapped sampled amplitudes which can be input from an output of Figure 3 A to individual ones of the complex coefficients for further use in pre-distorting the input signal in accordance with some embodiments of inventive concepts;

[0013] Figure 4 is a block diagram of a set of digital pre-distorters which digitally pre-distorts a set of input signals, and where each digital pre-distorter includes a set of Addr-LUTs to lookup complex coefficients (weights) from Data-LUTs which are structured and used in accordance with some embodiments of inventive concepts;

[0014] Figure 5 is a block diagram of one stage of a digital pre-distorter that uses a set of lookup tables which each have a set of gain functions to compensate for nonlinearity of a power amplifier, in accordance with some embodiments of inventive concepts;

[0015] Figure 6 is a block diagram of a digital pre-distorter configured according to some embodiments and outputs digitally pre-distorted signals to an analog front end for RF conditioning before amplification by power amplifiers and transmission through one or more antennas;

[0016] Figure 7 is a block diagram illustrating a wireless communication device or other user equipment (UE) according to some embodiments of inventive concepts; [0017] Figure 8 is a block diagram illustrating a radio access network RAN node (e.g., a base station eNB/gNB) according to some embodiments of inventive concepts;

[0018] Figure 9 is a block diagram illustrating a core network CN node (e.g., an AMF node, an SMF node, etc.) according to some embodiments of inventive concepts;

[0019] Figure 10 is a flow chart illustrating operations of a digital pre-distorter and associated methods according to some embodiments of inventive concepts;

[0020] Figure 11 is a block diagram of a communication system in accordance with some embodiments of inventive concepts;

[0021] Figure 12 is a block diagram of a user equipment in accordance with some embodiments of inventive concepts

[0022] Figure 13 is a block diagram of a network node in accordance with some embodiments of inventive concepts;

[0023] Figure 14 is a block diagram of a host computer communicating with a user equipment in accordance with some embodiments of inventive concepts;

[0024] Figure 15 is a block diagram of a virtualization environment in accordance with some embodiments of inventive concepts; and

[0025] Figure 16 is a block diagram of a host computer communicating via a base station with a user equipment over a partially wireless connection in accordance with some embodiments of inventive concepts.

DETAILED DESCRIPTION

[0026] Some of the embodiments contemplated herein will now be described more fully with reference to the accompanying drawings. Embodiments are provided by way of example to convey the scope of the subject matter to those skilled in the art. , in which examples of embodiments of inventive concepts are shown. Inventive concepts may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of present inventive concepts to those skilled in the art. It should also be noted that these embodiments are not mutually exclusive. Components from one embodiment may be tacitly assumed to be present/used in another embodiment.

[0027] Various embodiments of the present disclosure are directed to performing predistortion of input signals before providing to the input of an amplifier so as to provide a reduced distortion or un-distorted amplified signal at the output of the power amplifier. In accordance with various embodiments disclosed herein, a digital pre-distortion method for pre-distorting an input signal for amplification by a power power amplifier before transmission through at least one antenna includes obtaining the input signal. For a first stage of predistortion, the method processes a discrete amplitude of the input signal through a first set of addressing-look-up tables (Addr-LUTs) or first set of address mapping functions for a corresponding first set of data lookup tables (Data-LUTs) to output a set of mapped sampled amplitudes, where each of the Data- LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier. The method multiplies a set of the input signals by a corresponding set of complex coefficients retrieved from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digital pre-distorted input signals. The method generates a combined digitally pre-distorted input signal based on combining the intermediate digitally pre-distorted input signals of the set. The method then provides the combined digitally pre-distorted input signal to an analog front end for conditioning before amplification by the power amplifier and transmission through the at least one antenna.

[0028] As will be explained in further detail below, using a set of Addr-LUTs or a set of address mapping functions a set of gain functions for each Data-LUT can enable a digital predistorter (e.g., which may be implemented in hardware (e.g., digital logic gate circuit (e.g., FPGA)), in software performed by at least one microprocessor, , in a hybrid digital and analog circuit, in an artificial intelligence engine, etc.) to more accurately enhance a process for inversely compensating for complex nonlinear characteristics of a power amplifier, and can enable reduction in the amount of hardware resources (e.g., ASIC, RoS, SoC, memory and/or processing resources) which are needed to support digital pre-distortion of signals for radio communications, such as multiple-input multiple-output (MIMO) systems having multiple transmit antennas and associated amplifiers and signal paths.

[0029] Figure l is a diagram illustrating example spectrum of an output signal amplified by a nonlinear power amplifier. Figure 2 is a diagram illustrating example nonlinear power amplifier signal gain characteristic 200, a predistortion signal gain characteristic 202 configured as an inverse of the nonlinear power amplifier signal gain characteristic 200, and the combined resulting linear gain 204.

[0030] Referring to Figures 1 and 2, at lower input signal amplitudes the power amplifier PA has essentially linear gain characteristics 200 as a ratio of the output signal (Pout in Figure 2) to the input signal (Pin in Figure 2). However at higher amplitudes the power amplifier PA has increasingly nonlinear gain until it becomes saturated. This nonlinearity shows up as a broadened output spectrum (“Spectral regrowth” in Figure 1) around, between, and/or outside the band of the desired amplified signal (“Carrier#0”, “Carrier#l”, ... “Carrier#N” in Figure 1). The nonlinearity may also be due to memory effects from dependency of the current PA output on the previous PA output signals. As a countermeasure to decrease effects of power amplifier PA nonlinearity and/or memory effects, a digital pre-distorter operates to digitally pre-distort the input signal (Pin in Figure 2) to provide a predistortion signal gain characteristic 202 which is an inverse of the nonlinear power amplifier signal gain characteristic 200. The digitally pre-distorted input signal is combined with the input signal Pin to result in the power amplifier PA outputting an amplified signal having the linear gain characteristic 204.

[0031] Figure 3A is a diagram illustrating a set of addressing-look-up tables (Addr-LUTs) or set of address mapping functions for a corresponding set of data look-up tables (Data-LUTs) to output a set of mapped sampled amplitudes in accordance with some embodiments of inventive concepts. Figure 3B is a diagram illustrating a Data-LUT that includes a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier, and which maps individual ones of the possible mapped sampled amplitudes which can be input from an output of Figure 3 A to individual ones of the complex coefficients for further use in predistorting the input signal in accordance with some embodiments of inventive concepts.

[0032] Referring to Figures 3A and 3B, in some embodiments, each of the set of Addr-LUTs for each of the set of Data-LUTs may contain a data structure (which may be a multi-dimensional data structure) mapping a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set. Each of the set of Data-LUTs may contain a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients (also referred to as “complex numbers” and “weights”) of the set. The Addr-LUTs and the Data-LUTs may be multi-dimensional data structures. For each of the set of Addr-LUTs for each of the set of Data-LUTs, the data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set may include data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes. Different ones of the data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) can contain values defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal. [0033] For example, a selected instance of a discrete amplitude of an input signal is used as an index to retrieve a mapped sampled amplitude from a mapped one of the data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) or is processed through one of the address mapping functions of the set (e.g., one of the address mapping function #0 for Data-LUT, the address mapping function #1 for Data-LUT, ... or the address mapping function #N for Data- LUT) to compute the mapped sampled amplitude. The mapped sampled amplitude obtained from Figure 3A is then used as index to retrieve a complex coefficient (e.g., weight) from the Data- LUT in Figure 3B.

[0034] In some embodiments, values of the Addr-LUTs along boundaries between adjacent data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3 A) can be defined to provide a continuous shape and/or to provide reduced or no discontinuity in value trend (e.g., curve shape) across such boundaries.

[0035] In some other embodiments, each of the set of address mapping functions for each of the set of Data-LUTs functionally maps a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set. Each of the set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set. For each of the set of address mapping functions for each of the set of Data-LUTs, different ones of the first set of address mapping functions are used for different subranges of possible discrete amplitudes of the input signal to functionally map to different subranges of complex coefficients of the set. The different ones of the set of address mapping functions are defined based on nonlinear gain characteristics and input signal characteristics and characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

[0036] As will be explained in further detail below, the complex coefficients of the set of Data-LUTs can be adapted (e.g., by adaptation algorithm 604 in Fig. 6) based on an attenuated feedback signal from an output of the power amplifier (e.g., PA#0 in Fig. 6).

[0037] Figure 4 is a block diagram of a set of digital pre-distorters DPD#0, DPD#1, through DPD#N which digitally pre-distorts a set of input signals, and where each digital pre-distorter includes a set of Addr-LUTs to look-up complex coefficients (weights) from Data-LUTs which are structured and used in accordance with some embodiments of inventive concepts.

[0038] Referring to Figure 4, a first digital pre-distorter DPD#0 uses a plurality of predistorter stages PD#0, PD#1, through PD#N to determine a set of complex coefficients (e.g., weights) based on discretized amplitude of an input signal, where N is a positive plural integer number. In the illustrated embodiment, pre-distorter stage PD#0 determines a complex coefficient (e.g., weight) of the set by using an input signal discrete amplitude as an index to retrieve a mapped sampled amplitude from the Addr-LUT#0 for use in retrieving the complex coefficient from the Data-LUT#0 corresponding to PD#0. Addr-LUT#0 may include data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set. In some embodiments, each of the data structures correspond to data structure regions (e.g., Region#0, Region#l, through Region#X, where X is a positive plural integer) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes. Different ones of the data structure regions (e.g., Region#0, Region#l, through Region#X) may contain values defined based on nonlinear gain characteristics of the power amplifier and the input signal characteristics and characteristics when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

[0039] Alternatively, pre-distorter stage PD#0 determines/updates the complex coefficient (e.g., weight) of the set by processing the input signal discrete amplitude through (via the adaptation algorithm 608 in Fig. 6) one of a set of address mapping functions for LUT#0 (where the address mapping functions of the set are mapped to different possible ranges of the input signal discrete amplitudes) to compute a mapped sampled amplitude for use in retrieving the complex coefficient from the Data-LUT#0 corresponding to PD#0. In the illustrated example, the set of address mapping functions for LUT#0 include addressing mapping function #0 through address mapping function #X.

[0040] Similarly, the pre-distorter stage PD#0 determines another complex coefficient (e.g., weight) of the set by using the input signal discrete amplitude as an index to retrieve a mapped sampled amplitude from the Addr-LUT#1 for use in retrieving the complex coefficient from the Data-LUT#1 corresponding to PD#0. Addr-LUT#1 may include data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set. In some embodiments, each of the data structures correspond to data structure regions (e.g., Region#0, Region#l, through Region#Y, where Y is a positive plural integer) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes. Different ones of the data structure regions (e.g., Region#0, Region#l, through Region#Y) may contain values defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal. [0041] Alternatively, pre-distorter stage PD#0 determines the complex coefficient (e.g., weight) of the set by processing the input signal discrete amplitude through one of a set of address mapping functions for LUT#1 (where the address mapping functions of the set are mapped to different possible ranges of the input signal discrete amplitudes) to compute a mapped sampled amplitude for use in retrieving the complex coefficient from the Data-LUT#1 corresponding to PD#0. In the illustrated example, the set of address mapping functions for LUT#1 include addressing mapping function #0 through address mapping function #Y.

[0042] Similarly, the operations are repeated to determine further complex coefficients numbers of the set by using the input signal discrete amplitude as an index to retrieve a mapped sampled amplitude from further Addr-LUT#A, where A is a positive plural integer, for use in retrieving the complex coefficient from the Data-LUT#A corresponding to PD#0. Alternatively, pre-distorter stage PD#0 determines the complex coefficient (e.g., weight) of the set by processing the input signal discrete amplitude through one of a set of address mapping functions for LUT#A (where the address mapping functions of the set are mapped to different possible ranges of the input signal discrete amplitudes) to compute a mapped sampled amplitude for use in retrieving the complex coefficient from the Data-LUT#A corresponding to PD#0.

[0043] These operations are performed simultaneously for the all Data-LUTs within all other pre-distorter stages, e.g., PD#1 through PD#N of DPD#0. Moreover, the operations explained for DPD#0 can be similarly performed simultaneously for the all Data-LUTs within all other other DPD#1 through DPD#N, where N is a positive plural integer.

[0044] Figure 5 is a block diagram of one stage of a digital pre-distorter DPD(n) (e.g., PD#0, or PD#1, or PD#N of DPD#0 in Figure 4) that uses a set of addr-LUT and Data-LUT look-up tables which each have a set of gain functions to compensate for nonlinearity of a power amplifier, in accordance with some embodiments of inventive concepts.

[0045] Referring to Figure 5, a digital input signal X(n) is provided to a delay unit 500 where it is time delayed one or more sample periods to form a delayed digital input signal X(n) before it is used to look-up a mapped sampled amplitude in the Addr-LUT#0 502 for Data-LUT#0 or is processed by one of the set of address mapping functions 502 for Data-LUT#0 to compute the mapped sampled amplitude. The mapped sampled amplitude is then used to look-up a complex coefficients number (weight) from the Data-LUT#0 504. The looked-up complex coefficient number (weight) is provided to a multiplier 508, where it multiplies the input signal X(n), which has been time delayed one or more sample periods by another delay unit 506, to generate an intermediate digitally pre-distorted input signal. The time delay introduced by the delay units 500 and 506 may be defined to compensate for memory effect of the power amplifier output in the signals being multiplied by multiplier 508 (i.e., a time instance of input signal X(n) becomes time aligned with the corresponding time instance of the intermediate digitally pre-distorted input signal at the multiplier 508).

[0046] The input signal X(n) is provided to another delay unit 510 where it is time delayed one or more sample periods to form a delayed digital input signal X(n) before it is used to lookup a mapped sampled amplitude in the Addr-LUT#1 512 for Data-LUT#1 or is processed by one of the set of address mapping functions 512 for Data-LUT#1 to compute the mapped sampled amplitude. The mapped sampled amplitude is then used to look-up a complex coefficients number (weight) from the Data-LUT#1 514. The looked-up complex coefficient (weight) is provided to a multiplier 518, where it multiplies the input signal X(n), which has been time delayed one or more sample periods by another delay unit 516, to generate an intermediate digitally pre-distorted input signal. The time delay introduced by the delay units 510 and 516 may be defined to compensate for memory effect of the power amplifier output in the signals being multiplied by multiplier 518 (i.e., a time instance of input signal X(n) becomes time aligned with the corresponding time instance of the intermediate digitally pre-distorted input signal at the multiplier 518).

[0047] The input signal X(n) can similarly be provided to still another delay unit 520 where it is time delayed one or more sample periods to form a delayed digital input signal X(n) before it is used to look-up a mapped sampled amplitude in the Addr-LUT#A 522 (where A is a positive plural integer) for Data-LUT#A or is processed by one of the set of address mapping functions 522 for Data-LUT#A to compute the mapped sampled amplitude. The mapped sampled amplitude is then used to look-up a complex coefficient (weight) from the Data-LUT#A 524. The looked-up complex coefficient (weight) is provided to a multiplier 528, where it multiplies the input signal X(n), which has been time delayed one or more sample periods by another delay unit 526, to generate an intermediate digitally pre-distorted input signal. The time delay introduced by the delay units 520 and by 26 may be defined to compensate for memory effect of the power amplifier output in the signals being multiplied by multiplier by 28 (i.e., a time instance of input signal X(n) becomes time aligned with the corresponding time instance of the intermediate digitally pre-distorted input signal at the multiplier by 28).

[0048] Finally, the obtained products (i.e., the generated intermediate digitally pre-distorted input signals) are added to each other by adders 530a-530b, etc., to form a combined digitally pre-distorted signal PD(n) (e.g., PD(0) of DPD#0 in Figure 4). [0049] The combined digitally pre-distorted signal PD(n) may then be processed through a further stage of the digital pre-distorter DPD(n) (e.g., PD#1 of DPD#0 in Figure 4) to form another combined digitally pre-distorted signal PD(n) (e.g., PD(1) of DPD#0 in Figure 4). Similarly, the combined digitally pre-distorted signal PD(n) (e.g., PD(1) of DPD#0 in Figure 4) may be processed through one more further stages of the digital pre-distorter DPD(n) (e.g., PD#N of DPD#0 in Figure 4) to form further combined digitally pre-distorted signal PD(n) (e.g., PD#0 output from DPD#0 in Figure 4). The further combined digitally pre-distorted signal PD(n) (e.g., PD#0 output from DPD#0 in Figure 4) can then be provided to an analog front end, as will be described below with regard to Figure 6. In this manner, the digitally pre-distorted signals can be cascaded with all other PDs within the same DPD and the final/last PD output includes the DPD#N output (the final digitally pre-distorted signal which is fed to the analog front end (AFE). [0050] Figure 6 is a block diagram of a digital pre-distorter 600 which is configured according to some embodiments and outputs digitally pre-distorted signals DPD#0 through DPD#N to an analog front end 610 for RF conditioning before amplification by power amplifiers PA#0 through PA#N and transmission through one or more antennas 640.

[0051] Referring to Figure 6, the digital pre-distorter 600 obtains a set of input signals X#0 through X#N, where N is a positive integer number. The input signals X#0 through X#N may, for example, correspond to coded bits of user and/or application data traffic that is to be transmitted in an uplink direction (e.g., from a mobile terminal or other user equipment to a radio network node) or downlink direction (e.g., from a radio network node to a mobile terminal or other user equipment). Moreover, the input signals X#0 through X#N may each correspond to data traffic from respective different applications, e.g., in a one-to-one correspondence between different applications and different input signals, or the input signals may correspond to data traffic from one or more same applications, e.g., data traffic from one application divided or spread across multiple input signals. The set of input signals X#0 through X#N are processed through the corresponding set of digital pre-distorters DPD#0 through DPD#N, where the digital pre-distorters DPD#0 through DPD#N can each be configured to operate as explained above regarding Figures 3-5.

[0052] Digitally pre-distorted signals DPD#0 through DPD#N (combined digitally predistorted signals) output by respective digital pre-distorters DPD#0 through DPD#N are provided to the analog front end 610 which can convert the digital signals to analog signals. For example, the analog front end 610 may generate a set of analog signals from the digitally pre-distorted signals DPD#0 through DPD#N and modulate the analog signals with one or more RF carrier signals, and provide the set of modulated analog signals to a set of power amplifiers PA#0 through PA#N. The digitally pre-distorted signal DPD#0 may be formed using look-up tables having complex coefficients (e.g., weights) defined to compensate for nonlinear characteristics of PA#0 when amplifying an analog signal at a defined carrier frequency, and, similarly, digitally predistorted signal DPD#N may be formed using look-up tables having complex coefficients defined to compensate for nonlinear characteristics of PA#N when amplifying an analog signal at the same or another defined carrier frequency.

[0053] Amplified analog signals output by the power amplifiers PA#0 through PA#N are passed through couplers 630 for transmission through one or more antennas 640. For example, for a radio network node (e.g., eNB, gNB, etc.) supporting multi-input-multi-output (MIMO) radio communications, the couplers 630 may interconnect the power amplifiers PA#0 through PA#N with a set of radio network node antennas, such as up to 64 antennas although any number of antennas may be used. Similarly, for a mobile terminal or other user equipment supporting MIMO radio communications, the couplers 630 may interconnect the power amplifiers PA#0 through PA#N with a set of user equipment antennas, such as up to 16 antennas.

[0054] The amplified analog signals output by the power amplifiers PA#0 through PA#N may be separately fed-back through couplers 620a through 620n and the analog front end 610. The analog front end 610 may, for example, down-convert the feedback signals to baseband and digitally sample the baseband feedback signals, to output digital feedback signals to respective adaptation algorithms 604 and 608. For example, the amplified analog signal output by the power amplifiers PA#0 is fed-back through coupler 620a and may be down-converted and digitally sampled by the analog front end 610 to provide a digital feedback signal to the adaptation algorithm 604. Similarly, the amplified analog signal output by the power amplifiers PA#N is fed-back through coupler 620n and may be down-converted and digitally sampled by the analog front end 610 to provide a digital feedback signal to the adaptation algorithm 608.

[0055] The complex coefficients (e.g., weights) in the sets of LUTs, e.g., LUT#0 through LUT#A in Figure 4, may be adapted (e.g., replaced or modified) by the adaptation algorithms 604 and 608 based on the digital feedback signals associated with respective power amplifiers PA#0 and PA#N to cause the pre-distorted signal generated therefrom to more accurately inversely compensate (e.g., remove) effect of nonlinear characteristics of the respective power amplifier. For example, the adaptation algorithm 604 may adapt the complex coefficients (e.g., weights) in the sets of LUTs, e.g., LUT#0 through LUT#A in Figure 4 corresponding to PD#0 of DPD#0 based on the amplitude of the digital feedback signal associated with power amplifier PA#0, such as based on comparing the amplitude of the digital feedback signal to an amplitude of the original digital input signal, e.g., X#0.

[0056] Figure 10 is a flow chart illustrating operations of a digital pre-distorter 600 (Fig. 6) and associated methods according to some embodiments of inventive concepts. The operations are for pre-distorting an input signal (e.g., X#0 in Fig. 6) for amplification by a power power amplifier (e.g., PA#0 in Fig. 6) before transmission through at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8).

[0057] Referring to Figure 10, the operations include (a) obtaining 1000 the input signal. The operations further include (b) for a first stage of predistortion (e.g., PD#0 in Fig. 4), processing 1002 a discrete amplitude of the input signal through a first set of addressing-look-up tables, Addr-LUTs, (e.g., Addr-LUT#0, Addr-LUT#1, Addr-LUT#A) or first set of address mapping functions for a corresponding first set of data look-up tables, Data-LUTs, (e.g., Data-LUT#0, Data-LUT#1, Data-LUT#A) to output a set of mapped sampled amplitudes, wherein each of the Data-LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier (e.g., PA#0 in Fig. 6). Operations further include (c) multiplying 1004 a set of the input signals by a corresponding set of complex coefficients retrieved from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digitally pre-distorted input signals. Operations further include (d) generating 1006 a combined digitally pre-distorted input signal based on combining (e.g., 530a, 530b) the intermediate digitally pre-distorted input signals of the set. Operations further include (e) providing 1008 the combined digitally pre-distorted input signal to an analog front end (610) for conditioning before amplification by the power amplifier (e.g., PA#0 in Fig. 6) and transmission through the at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8).

[0058] In some further embodiments, each of the first set of Addr-LUTs for each of the first set of Data-LUTs contains a data structure mapping a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set. Moreover, each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

[0059] In some further embodiments, for each of the first set of Addr-LUTs for each of the first set of Data-LUTs, the data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set correspond to data structure regions (e.g., Region#0, Region#!, Region#N in Fig. 3 A) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes, different ones of the data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3 A) contain values defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

[0060] In some further embodiments, each of the first set of address mapping functions for each of the first set of Data-LUTs functionally maps a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set. Moreover, each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

[0061] In some further embodiments, for each of the first set of address mapping functions for each of the first set of Data-LUTs, different ones of the first set of address mapping functions are used for different sub-ranges of possible discrete amplitudes of the input signal to functionally map to different sub-ranges of complex coefficients of the set, wherein the different ones of the first set of address mapping functions are defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

[0062] In some further embodiments, operations further include adapting 604 the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier (e.g., PA#0 in Fig. 6).

[0063] In some further embodiments, the operations to adapt 604 the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, include adapting 604 the gain values of the first set of Data-LUTs based on amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6).

[0064] In some further embodiments, operations to adapt 604 the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, include adapting 604 the gain values of the first set of Data-LUTs based on comparison of the amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6) to the discrete amplitude of the input signal.

[0065] In some further embodiments, operations repeat the operations of (b) and (c) for a plurality number N of sequential stages of predistortion (e.g., PD#1 through PD#N in Fig. 4) including providing the set of intermediate digitally pre-distorted input signals which is generated by one stage of predistortion in operation (c) as the set of input signals which is multiplied by the operation (c) in a next sequential one of the sequential stages of predistortion, wherein each of the N sequential stages of predistortion accesses a respective different one of N sets of Addr- LUTs or different one of N sets of address mapping functions and corresponding one of N sets of Data-LUTs. Moreover, the operations use the set of intermediate digitally pre-distorted input signals generated by the Nth sequential stage of predistortion (e.g., PD#N) to generate the combined digitally pre-distorted input signal in the operation (d).

[0066] The operations of Figure 10 and described elsewhere herein may be performed by modules of a radio access network node 800 in Figure 8 and/or by modules of a communication device or other user equipment 700 in Figure 7, such as explained below.

[0067] Figure 7 is a block diagram illustrating elements of a communication device UE 700 (also referred to as a mobile terminal, a mobile communication terminal, a wireless device, a wireless communication device, a wireless terminal, mobile device, a wireless communication terminal, user equipment, UE, a user equipment node/terminal/device, etc.) configured to provide wireless communication according to embodiments of inventive concepts. (Communication device 700 may be provided, for example, as discussed below with respect to wireless devices UE QQ112A, UE QQ112B, and wired or wireless devices UE QQ112C, UE QQ112D of Figure 11, UE QQ200 of Figure 12, virtualization hardware QQ504 and virtual machines QQ508A, QQ508B of Figure 15, and UE QQ606 of Figure 16, all of which should be considered interchangeable in the examples and embodiments described herein and be within the intended scope of this disclosure, unless otherwise noted.) As shown, communication device UE may include one or more antenna(s) 640 (e.g., corresponding to antenna QQ222 of Figure 12), and transceiver circuitry 701 (also referred to as a transceiver, e.g., corresponding to interface QQ212 of Figure 12 having transmitter QQ218 and receiver QQ220) including a transmitter and a receiver configured to provide uplink and downlink radio communications with a base station(s) (e.g., corresponding to network node QQ110A, QQ110B of Figure 11, network node QQ300 of Figure 13, and network node QQ604 of Figure 16 also referred to as a RAN node) of a radio access network. Communication device UE may also include processing circuitry 703 (also referred to as a processor, e.g., corresponding to processing circuitry QQ202 of Figure 12, and control system QQ512 of Figure 15) coupled to the transceiver circuitry, and memory circuitry 705 (also referred to as memory, e.g., corresponding to memory QQ210 of Figure 11) coupled to the processing circuitry. The memory circuitry 705 may include computer readable program code that when executed by the processing circuitry 703 causes the processing circuitry to perform operations according to embodiments disclosed herein. According to other embodiments, processing circuitry 703 may be defined to include memory so that separate memory circuitry is not required. Communication device UE may also include an interface (such as a user interface) coupled with processing circuitry 703, and/or communication device UE may be incorporated in a vehicle.

[0068] As discussed herein, operations of communication device UE may be performed by processing circuitry 703 and/or transceiver circuitry 701. For example, processing circuitry 703 may control transceiver circuitry 701 to transmit communications through transceiver circuitry 701 over a radio interface to a radio access network node (also referred to as a base station) and/or to receive communications through transceiver circuitry 701 from a RAN node over a radio interface. Moreover, modules may be stored in memory circuitry 705, and these modules may provide instructions so that when instructions of a module are executed by processing circuitry 703, processing circuitry 703 performs respective operations (e.g., operations discussed below with respect to Example Embodiments relating to wireless communication devices). According to some embodiments, a communication device UE 700 and/or an element(s)/function(s) thereof may be embodied as a virtual node/nodes and/or a virtual machine/machines.

[0069] Figure 8 is a block diagram illustrating elements of a radio access network RAN node 800 (also referred to as a network node, base station, eNodeB/eNB, gNodeB/gNB, etc.) of a Radio Access Network (RAN) configured to provide cellular communication according to embodiments of inventive concepts. (RAN node 800 may be provided, for example, as discussed below with respect to network node QQ110A, QQ110B of Figure 11, network node QQ300 of Figure 13, hardware QQ504 or virtual machine QQ508A, QQ508B of Figure 15, and/or base station QQ604 of Figure 16, all of which should be considered interchangeable in the examples and embodiments described herein and be within the intended scope of this disclosure, unless otherwise noted.) As shown, the RAN node may include transceiver circuitry 801 (also referred to as a transceiver, e.g., corresponding to portions of RF transceiver circuitry QQ312 and radio front end circuitry QQ318 of Figure 13) including a transmitter which transmits through one or more antenna(s) 640 (e.g., MIMO configured plurality of antennas) and a receiver configured to provide uplink and downlink radio communications with mobile terminals. The RAN node may include network interface circuitry 807 (also referred to as a network interface, e.g., corresponding to portions of communication interface QQ306 of Figure 13) configured to provide communications with other nodes (e.g., with other base stations) of the RAN and/or core network CN. The network node may also include processing circuitry 803 (also referred to as a processor, e.g., corresponding to processing circuitry QQ302 of Figure 13) coupled to the transceiver circuitry, and memory circuitry 805 (also referred to as memory, e.g., corresponding to memory QQ304 of Figure 13) coupled to the processing circuitry. The memory circuitry 705 may include computer readable program code that when executed by the processing circuitry 703 causes the processing circuitry to perform operations according to embodiments disclosed herein. According to other embodiments, processing circuitry 803 may be defined to include memory so that a separate memory circuitry is not required.

[0070] As discussed herein, operations of the RAN node may be performed by processing circuitry 803, network interface 807, and/or transceiver 801. For example, processing circuitry 803 may control transceiver 801 to transmit downlink communications through transceiver 801 over a radio interface to one or more mobile terminals UEs and/or to receive uplink communications through transceiver 801 from one or more mobile terminals UEs over a radio interface. Similarly, processing circuitry 803 may control network interface 807 to transmit communications through network interface 807 to one or more other network nodes and/or to receive communications through network interface from one or more other network nodes. Moreover, modules may be stored in memory 805, and these modules may provide instructions so that when instructions of a module are executed by processing circuitry 803, processing circuitry 803 performs respective operations (e.g., operations discussed below with respect to Example Embodiments relating to RAN nodes). According to some embodiments, RAN node 800 and/or an element(s)/function(s) thereof may be embodied as a virtual node/nodes and/or a virtual machine/machines.

[0071] According to some other embodiments, a network node may be implemented as a core network CN node without a transceiver. In such embodiments, transmission to a wireless communication device UE may be initiated by the network node so that transmission to the wireless communication device UE is provided through a network node including a transceiver (e.g., through a base station or RAN node). According to embodiments where the network node is a RAN node including a transceiver, initiating transmission may include transmitting through the transceiver.

[0072] Figure 9 is a block diagram illustrating elements of a core network (CN) node 900 (e.g., an SMF (session management function) node, an AMF (access and mobility management function) node, etc.) of a communication network configured to provide cellular communication according to embodiments of inventive concepts. (CN node 900 may be provided, for example, as discussed below with respect to core network node QQ108 of Figure 11, hardware QQ504 or virtual machine QQ508A, QQ508B of Figure 15, all of which should be considered interchangeable in the examples and embodiments described herein and be within the intended scope of this disclosure, unless otherwise noted) As shown, the CN node may include network interface circuitry 907 configured to provide communications with other nodes of the core network and/or the radio access network RAN. The CN node may also include a processing circuitry 903 (also referred to as a processor,) coupled to the network interface circuitry, and memory circuitry 905 (also referred to as memory) coupled to the processing circuitry. The memory circuitry 905 may include computer readable program code that when executed by the processing circuitry 903 causes the processing circuitry to perform operations according to embodiments disclosed herein. According to other embodiments, processing circuitry 903 may be defined to include memory so that a separate memory circuitry is not required.

[0073] As discussed herein, operations of the CN node 900 may be performed by processing circuitry 903 and/or network interface circuitry 907. For example, processing circuitry 903 may control network interface circuitry 907 to transmit communications through network interface circuitry 907 to one or more other network nodes and/or to receive communications through network interface circuitry from one or more other network nodes. Moreover, modules may be stored in memory 905, and these modules may provide instructions so that when instructions of a module are executed by processing circuitry 903, processing circuitry 903 performs respective operations (e.g., operations discussed below with respect to Example Embodiments relating to core network nodes). According to some embodiments, CN node 900 and/or an element(s)/function(s) thereof may be embodied as a virtual node/nodes and/or a virtual machine/machines.

[0074] In the description herein, while the communication device may be any of the communication device 600, wireless device QQ112A, QQ112B, wired or wireless devices UE QQ112C, UE QQ112D, UE QQ200, virtualization hardware QQ504, virtual machines QQ508A, QQ508B, or UE QQ606, the communication device shall be used to describe the functionality of the operations of the communication device. Operations of the communication device may be implemented using the structure of the block diagram of Figure 10 according to some embodiments of inventive concepts. For example, modules may be stored in memory 705 of Figure 7, and these modules may provide instructions so that when the instructions of a module are executed by respective communication device processing circuitry 703, processing circuitry 703 performs respective operations of the flow chart.

[0075] In the description herein, while the network node may be any of the RAN node 800, network node QQ110A, QQ110B, QQ300, QQ606, hardware QQ504, or virtual machine QQ508A, QQ508B, the RAN node 800 shall be used to describe the functionality of the operations of the network node. Operations of the RAN node 800 may be implemented using the structure of the block diagram of Figure 10 according to some embodiments of inventive concepts. For example, modules may be stored in memory 805 of Figure 8, and these modules may provide instructions so that when the instructions of a module are executed by respective RAN node processing circuitry 803, processing circuitry 803 performs respective operations of the flow chart.

[0076] In the description herein, while the core network node may be any of the core network node 900, core network node QQ108, hardware QQ504, or virtual machine QQ508A, QQ508B, the core network node 900 shall be used to describe the functionality of the operations of the network node. Operations of the Core Network CN node 900 may be implemented using the structure of the block diagram of Figure 10 according to some embodiments of inventive concepts. For example, modules may be stored in memory 905 of Figure 9, and these modules may provide instructions so that when the instructions of a module are executed by respective CN node processing circuitry 903, processing circuitry 903 performs respective operations of the flow chart.

[0077] Figure 11 shows an example of a communication system QQ100 in accordance with some embodiments.

[0078] In the example, the communication system QQ100 includes a telecommunication network QQ102 that includes an access network QQ104, such as a radio access network (RAN), and a core network QQ106, which includes one or more core network nodes QQ108. The access network QQ104 includes one or more access network nodes, such as network nodes QQ110a and QQ110b (one or more of which may be generally referred to as network nodes QQ110), or any other similar 3rd Generation Partnership Project (3GPP) access node or non-3GPP access point. The network nodes QQ110 facilitate direct or indirect connection of user equipment (UE), such as by connecting UEs QQ112a, QQ112b, QQ112c, and QQ112d (one or more of which may be generally referred to as UEs QQ112) to the core network QQ106 over one or more wireless connections.

[0079] Example wireless communications over a wireless connection include transmitting and/or receiving wireless signals using electromagnetic waves, radio waves, infrared waves, and/or other types of signals suitable for conveying information without the use of wires, cables, or other material conductors. Moreover, in different embodiments, the communication system QQ100 may include any number of wired or wireless networks, network nodes, UEs, and/or any other components or systems that may facilitate or participate in the communication of data and/or signals whether via wired or wireless connections. The communication system QQ100 may include and/or interface with any type of communication, telecommunication, data, cellular, radio network, and/or other similar type of system.

[0080] The UEs QQ112 may be any of a wide variety of communication devices, including wireless devices arranged, configured, and/or operable to communicate wirelessly with the network nodes QQ110 and other communication devices. Similarly, the network nodes QQ110 are arranged, capable, configured, and/or operable to communicate directly or indirectly with the UEs QQ112 and/or with other network nodes or equipment in the telecommunication network QQ102 to enable and/or provide network access, such as wireless network access, and/or to perform other functions, such as administration in the telecommunication network QQ102.

[0081] In the depicted example, the core network QQ106 connects the network nodes QQ110 to one or more hosts, such as host QQ116. These connections may be direct or indirect via one or more intermediary networks or devices. In other examples, network nodes may be directly coupled to hosts. The core network QQ106 includes one more core network nodes (e.g., core network node QQ108) that are structured with hardware and software components. Features of these components may be substantially similar to those described with respect to the UEs, network nodes, and/or hosts, such that the descriptions thereof are generally applicable to the corresponding components of the core network node QQ108. Example core network nodes include functions of one or more of a Mobile Switching Center (MSC), Mobility Management Entity (MME), Home Subscriber Server (HSS), Access and Mobility Management Function (AMF), Session Management Function (SMF), Authentication Server Function (AUSF), Subscription Identifier De-concealing function (SIDF), Unified Data Management (UDM), Security Edge Protection Proxy (SEPP), Network Exposure Function (NEF), and/or a User Plane Function (UPF).

[0082] The host QQ116 may be under the ownership or control of a service provider other than an operator or provider of the access network QQ104 and/or the telecommunication network QQ102, and may be operated by the service provider or on behalf of the service provider. The host QQ116 may host a variety of applications to provide one or more service. Examples of such applications include live and pre-recorded audio/video content, data collection services such as retrieving and compiling data on various ambient conditions detected by a plurality of UEs, analytics functionality, social media, functions for controlling or otherwise interacting with remote devices, functions for an alarm and surveillance center, or any other such function performed by a server. [0083] As a whole, the communication system QQ100 of Figure 11 enables connectivity between the UEs, network nodes, and hosts. In that sense, the communication system may be configured to operate according to predefined rules or procedures, such as specific standards that include, but are not limited to: Global System for Mobile Communications (GSM); Universal Mobile Telecommunications System (UMTS); Long Term Evolution (LTE), and/or other suitable 2G, 3G, 4G, 5G standards, or any applicable future generation standard (e.g., 6G); wireless local area network (WLAN) standards, such as the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standards (WiFi); and/or any other appropriate wireless communication standard, such as the Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, Z-Wave, Near Field Communication (NFC) ZigBee, LiFi, and/or any low-power wide-area network (LPWAN) standards such as LoRa and Sigfox.

[0084] In some examples, the telecommunication network QQ102 is a cellular network that implements 3 GPP standardized features. Accordingly, the telecommunications network QQ102 may support network slicing to provide different logical networks to different devices that are connected to the telecommunication network QQ102. For example, the telecommunications network QQ102 may provide Ultra Reliable Low Latency Communication (URLLC) services to some UEs, while providing Enhanced Mobile Broadband (eMBB) services to other UEs, and/or Massive Machine Type Communication (mMTC)/Massive loT services to yet further UEs.

[0085] In some examples, the UEs QQ112 are configured to transmit and/or receive information without direct human interaction. For instance, a UE may be designed to transmit information to the access network QQ104 on a predetermined schedule, when triggered by an internal or external event, or in response to requests from the access network QQ104. Additionally, a UE may be configured for operating in single- or multi-RAT or multi-standard mode. For example, a UE may operate with any one or combination of Wi-Fi, NR (New Radio) and LTE, i.e. being configured for multi-radio dual connectivity (MR-DC), such as E-UTRAN (Evolved-UMTS Terrestrial Radio Access Network) New Radio - Dual Connectivity (EN-DC). [0086] In the example, the hub QQ114 communicates with the access network QQ104 to facilitate indirect communication between one or more UEs (e.g., UE QQ112c and/or QQ112d) and network nodes (e.g., network node QQl lOb). In some examples, the hub QQ114 may be a controller, router, content source and analytics, or any of the other communication devices described herein regarding UEs. For example, the hub QQ114 may be a broadband router enabling access to the core network QQ106 for the UEs. As another example, the hub QQ114 may be a controller that sends commands or instructions to one or more actuators in the UEs. Commands or instructions may be received from the UEs, network nodes QQ110, or by executable code, script, process, or other instructions in the hub QQ114. As another example, the hub QQ114 may be a data collector that acts as temporary storage for UE data and, in some embodiments, may perform analysis or other processing of the data. As another example, the hub QQ114 may be a content source. For example, for a UE that is a VR headset, display, loudspeaker or other media delivery device, the hub QQ114 may retrieve VR assets, video, audio, or other media or data related to sensory information via a network node, which the hub QQ114 then provides to the UE either directly, after performing local processing, and/or after adding additional local content. In still another example, the hub QQ114 acts as a proxy server or orchestrator for the UEs, in particular in if one or more of the UEs are low energy loT devices. [0087] The hub QQ114 may have a constant/persistent or intermittent connection to the network node QQl lOb. The hub QQ114 may also allow for a different communication scheme and/or schedule between the hub QQ114 and UEs (e.g., UE QQ112c and/or QQ112d), and between the hub QQ114 and the core network QQ106. In other examples, the hub QQ114 is connected to the core network QQ106 and/or one or more UEs via a wired connection. Moreover, the hub QQ 114 may be configured to connect to an M2M service provider over the access network QQ104 and/or to another UE over a direct connection. In some scenarios, UEs may establish a wireless connection with the network nodes QQ110 while still connected via the hub QQ114 via a wired or wireless connection. In some embodiments, the hub QQ114 may be a dedicated hub - that is, a hub whose primary function is to route communications to/from the UEs from/to the network node QQ110b. In other embodiments, the hub QQ114 may be a non-dedicated hub - that is, a device which is capable of operating to route communications between the UEs and network node QQ110b, but which is additionally capable of operating as a communication start and/or end point for certain data channels.

[0088] Figure 12 shows a UE QQ200 in accordance with some embodiments. As used herein, a UE refers to a device capable, configured, arranged and/or operable to communicate wirelessly with network nodes and/or other UEs. Examples of a UE include, but are not limited to, a smart phone, mobile phone, cell phone, voice over IP (VoIP) phone, wireless local loop phone, desktop computer, personal digital assistant (PDA), wireless cameras, gaming console or device, music storage device, playback appliance, wearable terminal device, wireless endpoint, mobile station, tablet, laptop, laptop-embedded equipment (LEE), laptop-mounted equipment (LME), smart device, wireless customer-premise equipment (CPE), vehicle-mounted or vehicle embedded/integrated wireless device, etc. Other examples include any UE identified by the 3rd Generation Partnership Project (3 GPP), including a narrow band internet of things (NB-IoT) UE, a machine type communication (MTC) UE, and/or an enhanced MTC (eMTC) UE.

[0089] A UE may support device-to-device (D2D) communication, for example by implementing a 3 GPP standard for sidelink communication, Dedicated Short-Range Communication (DSRC), vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), or vehicle- to-everything (V2X). In other examples, a UE may not necessarily have a user in the sense of a human user who owns and/or operates the relevant device. Instead, a UE may represent a device that is intended for sale to, or operation by, a human user but which may not, or which may not initially, be associated with a specific human user (e.g., a smart sprinkler controller). Alternatively, a UE may represent a device that is not intended for sale to, or operation by, an end user but which may be associated with or operated for the benefit of a user (e.g., a smart power meter).

[0090] The UE QQ200 includes processing circuitry QQ202 that is operatively coupled via a bus QQ204 to an input/output interface QQ206, a power source QQ208, a memory QQ210, a communication interface QQ212, and/or any other component, or any combination thereof. Certain UEs may utilize all or a subset of the components shown in Figure 12. The level of integration between the components may vary from one UE to another UE. Further, certain UEs may contain multiple instances of a component, such as multiple processors, memories, transceivers, transmitters, receivers, etc.

[0091] The processing circuitry QQ202 is configured to process instructions and data and may be configured to implement any sequential state machine operative to execute instructions stored as machine-readable computer programs in the memory QQ210. The processing circuitry QQ202 may be implemented as one or more hardware-implemented state machines (e.g., in discrete logic, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), etc.); programmable logic together with appropriate firmware; one or more stored computer programs, general-purpose processors, such as a microprocessor or digital signal processor (DSP), together with appropriate software; or any combination of the above. For example, the processing circuitry QQ202 may include multiple central processing units (CPUs).

[0092] In the example, the input/output interface QQ206 may be configured to provide an interface or interfaces to an input device, output device, or one or more input and/or output devices. Examples of an output device include a speaker, a sound card, a video card, a display, a monitor, a printer, an actuator, an emitter, a smartcard, another output device, or any combination thereof. An input device may allow a user to capture information into the UE QQ200. Examples of an input device include a touch-sensitive or presence-sensitive display, a camera (e.g., a digital camera, a digital video camera, a web camera, etc.), a microphone, a sensor, a mouse, a trackball, a directional pad, a trackpad, a scroll wheel, a smartcard, and the like. The presence-sensitive display may include a capacitive or resistive touch sensor to sense input from a user. A sensor may be, for instance, an accelerometer, a gyroscope, a tilt sensor, a force sensor, a magnetometer, an optical sensor, a proximity sensor, a biometric sensor, etc., or any combination thereof. An output device may use the same type of interface port as an input device. For example, a Universal Serial Bus (USB) port may be used to provide an input device and an output device.

[0093] In some embodiments, the power source QQ208 is structured as a battery or battery pack. Other types of power sources, such as an external power source (e.g., an electricity outlet), photovoltaic device, or power cell, may be used. The power source QQ208 may further include power circuitry for delivering power from the power source QQ208 itself, and/or an external power source, to the various parts of the UE QQ200 via input circuitry or an interface such as an electrical power cable. Delivering power may be, for example, for charging of the power source QQ208. Power circuitry may perform any formatting, converting, or other modification to the power from the power source QQ208 to make the power suitable for the respective components of the UE QQ200 to which power is supplied.

[0094] The memory QQ210 may be or be configured to include memory such as random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable readonly memory (EEPROM), magnetic disks, optical disks, hard disks, removable cartridges, flash drives, and so forth. In one example, the memory QQ210 includes one or more application programs QQ214, such as an operating system, web browser application, a widget, gadget engine, or other application, and corresponding data QQ216. The memory QQ210 may store, for use by the UE QQ200, any of a variety of various operating systems or combinations of operating systems.

[0095] The memory QQ210 may be configured to include a number of physical drive units, such as redundant array of independent disks (RAID), flash memory, USB flash drive, external hard disk drive, thumb drive, pen drive, key drive, high-density digital versatile disc (HD-DVD) optical disc drive, internal hard disk drive, Blu-Ray optical disc drive, holographic digital data storage (HDDS) optical disc drive, external mini-dual in-line memory module (DIMM), synchronous dynamic random access memory (SDRAM), external micro-DIMM SDRAM, smartcard memory such as tamper resistant module in the form of a universal integrated circuit card (UICC) including one or more subscriber identity modules (SIMs), such as a USIM and/or ISIM, other memory, or any combination thereof. The UICC may for example be an embedded UICC (eUICC), integrated UICC (iUICC) or a removable UICC commonly known as ‘SIM card.’ The memory QQ210 may allow the UE QQ200 to access instructions, application programs and the like, stored on transitory or non-transitory memory media, to off-load data, or to upload data. An article of manufacture, such as one utilizing a communication system may be tangibly embodied as or in the memory QQ210, which may be or comprise a device-readable storage medium.

[0096] The processing circuitry QQ202 may be configured to communicate with an access network or other network using the communication interface QQ212. The communication interface QQ212 may comprise one or more communication subsystems and may include or be communicatively coupled to an antenna QQ222. The communication interface QQ212 may include one or more transceivers used to communicate, such as by communicating with one or more remote transceivers of another device capable of wireless communication (e.g., another UE or a network node in an access network). Each transceiver may include a transmitter QQ218 and/or a receiver QQ220 appropriate to provide network communications (e.g., optical, electrical, frequency allocations, and so forth). Moreover, the transmitter QQ218 and receiver QQ220 may be coupled to one or more antennas (e.g., antenna QQ222) and may share circuit components, software or firmware, or alternatively be implemented separately.

[0097] In the illustrated embodiment, communication functions of the communication interface QQ212 may include cellular communication, Wi-Fi communication, LPWAN communication, data communication, voice communication, multimedia communication, short- range communications such as Bluetooth, near-field communication, location-based communication such as the use of the global positioning system (GPS) to determine a location, another like communication function, or any combination thereof. Communications may be implemented in according to one or more communication protocols and/or standards, such as IEEE 802.11, Code Division Multiplexing Access (CDMA), Wideband Code Division Multiple Access (WCDMA), GSM, LTE, New Radio (NR), UMTS, WiMax, Ethernet, transmission control protocol/internet protocol (TCP/IP), synchronous optical networking (SONET), Asynchronous Transfer Mode (ATM), QUIC, Hypertext Transfer Protocol (HTTP), and so forth. [0098] Regardless of the type of sensor, a UE may provide an output of data captured by its sensors, through its communication interface QQ212, via a wireless connection to a network node. Data captured by sensors of a UE can be communicated through a wireless connection to a network node via another UE. The output may be periodic (e.g., once every 15 minutes if it reports the sensed temperature), random (e.g., to even out the load from reporting from several sensors), in response to a triggering event (e.g., when moisture is detected an alert is sent), in response to a request (e.g., a user initiated request), or a continuous stream (e.g., a live video feed of a patient). [0099] As another example, a UE comprises an actuator, a motor, or a switch, related to a communication interface configured to receive wireless input from a network node via a wireless connection. In response to the received wireless input the states of the actuator, the motor, or the switch may change. For example, the UE may comprise a motor that adjusts the control surfaces or rotors of a drone in flight according to the received input or to a robotic arm performing a medical procedure according to the received input.

[0100] A UE, when in the form of an Internet of Things (loT) device, may be a device for use in one or more application domains, these domains comprising, but not limited to, city wearable technology, extended industrial application and healthcare. Non-limiting examples of such an loT device are a device which is or which is embedded in: a connected refrigerator or freezer, a TV, a connected lighting device, an electricity meter, a robot vacuum cleaner, a voice controlled smart speaker, a home security camera, a motion detector, a thermostat, a smoke detector, a door/window sensor, a flood/moisture sensor, an electrical door lock, a connected doorbell, an air conditioning system like a heat pump, an autonomous vehicle, a surveillance system, a weather monitoring device, a vehicle parking monitoring device, an electric vehicle charging station, a smart watch, a fitness tracker, a head-mounted display for Augmented Reality (AR) or Virtual Reality (VR), a wearable for tactile augmentation or sensory enhancement, a water sprinkler, an animal- or item-tracking device, a sensor for monitoring a plant or animal, an industrial robot, an Unmanned Aerial Vehicle (UAV), and any kind of medical device, like a heart rate monitor or a remote controlled surgical robot. A UE in the form of an loT device comprises circuitry and/or software in dependence of the intended application of the loT device in addition to other components as described in relation to the UE QQ200 shown in Figure 12.

[0101] As yet another specific example, in an loT scenario, a UE may represent a machine or other device that performs monitoring and/or measurements, and transmits the results of such monitoring and/or measurements to another UE and/or a network node. The UE may in this case be an M2M device, which may in a 3GPP context be referred to as an MTC device. As one particular example, the UE may implement the 3 GPP NB-IoT standard. In other scenarios, a UE may represent a vehicle, such as a car, a bus, a truck, a ship and an airplane, or other equipment that is capable of monitoring and/or reporting on its operational status or other functions associated with its operation.

[0102] In practice, any number of UEs may be used together with respect to a single use case. For example, a first UE might be or be integrated in a drone and provide the drone’s speed information (obtained through a speed sensor) to a second UE that is a remote controller operating the drone. When the user makes changes from the remote controller, the first UE may adjust the throttle on the drone (e.g. by controlling an actuator) to increase or decrease the drone’s speed. The first and/or the second UE can also include more than one of the functionalities described above. For example, a UE might comprise the sensor and the actuator, and handle communication of data for both the speed sensor and the actuators.

[0103] Figure 13 shows a network node QQ300 in accordance with some embodiments. As used herein, network node refers to equipment capable, configured, arranged and/or operable to communicate directly or indirectly with a UE and/or with other network nodes or equipment, in a telecommunication network. Examples of network nodes include, but are not limited to, access points (APs) (e.g., radio access points), base stations (BSs) (e.g., radio base stations, Node Bs, evolved Node Bs (eNBs) and NRNodeBs (gNBs)).

[0104] Base stations may be categorized based on the amount of coverage they provide (or, stated differently, their transmit power level) and so, depending on the provided amount of coverage, may be referred to as femto base stations, pico base stations, micro base stations, or macro base stations. A base station may be a relay node or a relay donor node controlling a relay. A network node may also include one or more (or all) parts of a distributed radio base station such as centralized digital units and/or remote radio units (RRUs), sometimes referred to as Remote Radio Heads (RRHs). Such remote radio units may or may not be integrated with an antenna as an antenna integrated radio. Parts of a distributed radio base station may also be referred to as nodes in a distributed antenna system (DAS).

[0105] Other examples of network nodes include multiple transmission point (multi-TRP) 5G access nodes, multi-standard radio (MSR) equipment such as MSR BSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes, multi-cell/multicast coordination entities (MCEs), Operation and Maintenance (O&M) nodes, Operations Support System (OSS) nodes, Self-Organizing Network (SON) nodes, positioning nodes (e.g., Evolved Serving Mobile Location Centers (E-SMLCs)), and/or Minimization of Drive Tests (MDTs). [0106] The network node QQ300 includes a processing circuitry QQ302, a memory QQ304, a communication interface QQ306, and a power source QQ308. The network node QQ300 may be composed of multiple physically separate components (e.g., a NodeB component and a RNC component, or a BTS component and a BSC component, etc.), which may each have their own respective components. In certain scenarios in which the network node QQ300 comprises multiple separate components (e.g., BTS and BSC components), one or more of the separate components may be shared among several network nodes. For example, a single RNC may control multiple NodeBs. In such a scenario, each unique NodeB and RNC pair, may in some instances be considered a single separate network node. In some embodiments, the network node QQ300 may be configured to support multiple radio access technologies (RATs). In such embodiments, some components may be duplicated (e.g., separate memory QQ304 for different RATs) and some components may be reused (e.g., a same antenna QQ310 may be shared by different RATs). The network node QQ300 may also include multiple sets of the various illustrated components for different wireless technologies integrated into network node QQ300, for example GSM, WCDMA, LTE, NR, WiFi, Zigbee, Z-wave, LoRaWAN, Radio Frequency Identification (RFID) or Bluetooth wireless technologies. These wireless technologies may be integrated into the same or different chip or set of chips and other components within network node QQ300.

[0107] The processing circuitry QQ302 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application-specific integrated circuit, field programmable gate array, or any other suitable computing device, resource, or combination of hardware, software and/or encoded logic operable to provide, either alone or in conjunction with other network node QQ300 components, such as the memory QQ304, to provide network node QQ300 functionality.

[0108] In some embodiments, the processing circuitry QQ302 includes a system on a chip (SOC). In some embodiments, the processing circuitry QQ302 includes one or more of radio frequency (RF) transceiver circuitry QQ312 and baseband processing circuitry QQ314. In some embodiments, the radio frequency (RF) transceiver circuitry QQ312 and the baseband processing circuitry QQ314 may be on separate chips (or sets of chips), boards, or units, such as radio units and digital units. In alternative embodiments, part or all of RF transceiver circuitry QQ312 and baseband processing circuitry QQ314 may be on the same chip or set of chips, boards, or units. [0109] The memory QQ304 may comprise any form of volatile or non-volatile computer- readable memory including, without limitation, persistent storage, solid-state memory, remotely mounted memory, magnetic media, optical media, random access memory (RAM), read-only memory (ROM), mass storage media (for example, a hard disk), removable storage media (for example, a flash drive, a Compact Disk (CD) or a Digital Video Disk (DVD)), and/or any other volatile or non-volatile, non-transitory device-readable and/or computer-executable memory devices that store information, data, and/or instructions that may be used by the processing circuitry QQ302. The memory QQ304 may store any suitable instructions, data, or information, including a computer program, software, an application including one or more of logic, rules, code, tables, and/or other instructions capable of being executed by the processing circuitry QQ302 and utilized by the network node QQ300. The memory QQ304 may be used to store any calculations made by the processing circuitry QQ302 and/or any data received via the communication interface QQ306. In some embodiments, the processing circuitry QQ302 and memory QQ304 is integrated.

[0110] The communication interface QQ306 is used in wired or wireless communication of signaling and/or data between a network node, access network, and/or UE. As illustrated, the communication interface QQ306 comprises port(s)/terminal(s) QQ316 to send and receive data, for example to and from a network over a wired connection. The communication interface QQ306 also includes radio front-end circuitry QQ318 that may be coupled to, or in certain embodiments a part of, the antenna QQ310. Radio front-end circuitry QQ318 comprises filters QQ320 and amplifiers QQ322. The radio front-end circuitry QQ318 may be connected to an antenna QQ310 and processing circuitry QQ302. The radio front-end circuitry may be configured to condition signals communicated between antenna QQ310 and processing circuitry QQ302. The radio frontend circuitry QQ318 may receive digital data that is to be sent out to other network nodes or UEs via a wireless connection. The radio front-end circuitry QQ318 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters QQ320 and/or amplifiers QQ322. The radio signal may then be transmitted via the antenna QQ3 10. Similarly, when receiving data, the antenna QQ310 may collect radio signals which are then converted into digital data by the radio front-end circuitry QQ318. The digital data may be passed to the processing circuitry QQ302. In other embodiments, the communication interface may comprise different components and/or different combinations of components.

[OHl] In certain alternative embodiments, the network node QQ300 does not include separate radio front-end circuitry QQ318, instead, the processing circuitry QQ302 includes radio frontend circuitry and is connected to the antenna QQ310. Similarly, in some embodiments, all or some of the RF transceiver circuitry QQ312 is part of the communication interface QQ306. In still other embodiments, the communication interface QQ306 includes one or more ports or terminals QQ316, the radio front-end circuitry QQ318, and the RF transceiver circuitry QQ312, as part of a radio unit (not shown), and the communication interface QQ306 communicates with the baseband processing circuitry QQ314, which is part of a digital unit (not shown).

[0112] The antenna QQ310 may include one or more antennas, or antenna arrays, configured to send and/or receive wireless signals. The antenna QQ310 may be coupled to the radio frontend circuitry QQ318 and may be any type of antenna capable of transmitting and receiving data and/or signals wirelessly. In certain embodiments, the antenna QQ310 is separate from the network node QQ300 and connectable to the network node QQ300 through an interface or port. [0113] The antenna QQ310, communication interface QQ306, and/or the processing circuitry QQ302 may be configured to perform any receiving operations and/or certain obtaining operations described herein as being performed by the network node. Any information, data and/or signals may be received from a UE, another network node and/or any other network equipment. Similarly, the antenna QQ310, the communication interface QQ306, and/or the processing circuitry QQ302 may be configured to perform any transmitting operations described herein as being performed by the network node. Any information, data and/or signals may be transmitted to a UE, another network node and/or any other network equipment.

[0114] The power source QQ308 provides power to the various components of network node QQ300 in a form suitable for the respective components (e.g., at a voltage and current level needed for each respective component). The power source QQ308 may further comprise, or be coupled to, power management circuitry to supply the components of the network node QQ300 with power for performing the functionality described herein. For example, the network node QQ300 may be connectable to an external power source (e.g., the power grid, an electricity outlet) via an input circuitry or interface such as an electrical cable, whereby the external power source supplies power to power circuitry of the power source QQ308. As a further example, the power source QQ308 may comprise a source of power in the form of a battery or battery pack which is connected to, or integrated in, power circuitry. The battery may provide backup power should the external power source fail.

[0115] Embodiments of the network node QQ300 may include additional components beyond those shown in Figure 13 for providing certain aspects of the network node’s functionality, including any of the functionality described herein and/or any functionality necessary to support the subject matter described herein. For example, the network node QQ300 may include user interface equipment to allow input of information into the network node QQ300 and to allow output of information from the network node QQ300. This may allow a user to perform diagnostic, maintenance, repair, and other administrative functions for the network node QQ300. [0116] Figure 14 is a block diagram of a host QQ400, which may be an embodiment of the host QQ116 of Figure 11, in accordance with various aspects described herein. As used herein, the host QQ400 may be or comprise various combinations hardware and/or software, including a standalone server, a blade server, a cloud-implemented server, a distributed server, a virtual machine, container, or processing resources in a server farm. The host QQ400 may provide one or more services to one or more UEs.

[0117] The host QQ400 includes processing circuitry QQ402 that is operatively coupled via a bus QQ404 to an input/output interface QQ406, a network interface QQ408, a power source QQ410, and a memory QQ412. Other components may be included in other embodiments. Features of these components may be substantially similar to those described with respect to the devices of previous figures, such as Figures 12 and 13, such that the descriptions thereof are generally applicable to the corresponding components of host QQ400.

[0118] The memory QQ412 may include one or more computer programs including one or more host application programs QQ414 and data QQ416, which may include user data, e.g., data generated by a UE for the host QQ400 or data generated by the host QQ400 for a UE. Embodiments of the host QQ400 may utilize only a subset or all of the components shown. The host application programs QQ414 may be implemented in a container-based architecture and may provide support for video codecs (e.g., Versatile Video Coding (VVC), High Efficiency Video Coding (HEVC), Advanced Video Coding (AVC), MPEG, VP9) and audio codecs (e.g., FLAC, Advanced Audio Coding (AAC), MPEG, G.711), including transcoding for multiple different classes, types, or implementations of UEs (e.g., handsets, desktop computers, wearable display systems, heads-up display systems). The host application programs QQ414 may also provide for user authentication and licensing checks and may periodically report health, routes, and content availability to a central node, such as a device in or on the edge of a core network. Accordingly, the host QQ400 may select and/or indicate a different host for over-the-top services for a UE. The host application programs QQ414 may support various protocols, such as the HTTP Live Streaming (HLS) protocol, Real-Time Messaging Protocol (RTMP), Real-Time Streaming Protocol (RTSP), Dynamic Adaptive Streaming over HTTP (MPEG-DASH), etc.

[0119] Figure 15 is a block diagram illustrating a virtualization environment QQ500 in which functions implemented by some embodiments may be virtualized. In the present context, virtualizing means creating virtual versions of apparatuses or devices which may include virtualizing hardware platforms, storage devices and networking resources. As used herein, virtualization can be applied to any device described herein, or components thereof, and relates to an implementation in which at least a portion of the functionality is implemented as one or more virtual components. Some or all of the functions described herein may be implemented as virtual components executed by one or more virtual machines (VMs) implemented in one or more virtual environments QQ500 hosted by one or more of hardware nodes, such as a hardware computing device that operates as a network node, UE, core network node, or host. Further, in embodiments in which the virtual node does not require radio connectivity (e.g., a core network node or host), then the node may be entirely virtualized.

[0120] Applications QQ502 (which may alternatively be called software instances, virtual appliances, network functions, virtual nodes, virtual network functions, etc.) are run in the virtualization environment Q400 to implement some of the features, functions, and/or benefits of some of the embodiments disclosed herein.

[0121] Hardware QQ504 includes processing circuitry, memory that stores software and/or instructions executable by hardware processing circuitry, and/or other hardware devices as described herein, such as a network interface, input/output interface, and so forth. Software may be executed by the processing circuitry to instantiate one or more virtualization layers QQ506 (also referred to as hypervisors or virtual machine monitors (VMMs)), provide VMs QQ508a and QQ508b (one or more of which may be generally referred to as VMs QQ508), and/or perform any of the functions, features and/or benefits described in relation with some embodiments described herein. The virtualization layer QQ506 may present a virtual operating platform that appears like networking hardware to the VMs QQ508.

[0122] The VMs QQ508 comprise virtual processing, virtual memory, virtual networking or interface and virtual storage, and may be run by a corresponding virtualization layer QQ506. Different embodiments of the instance of a virtual appliance QQ502 may be implemented on one or more of VMs QQ508, and the implementations may be made in different ways. Virtualization of the hardware is in some contexts referred to as network function virtualization (NFV). NFV may be used to consolidate many network equipment types onto industry standard high volume server hardware, physical switches, and physical storage, which can be located in data centers, and customer premise equipment.

[0123] In the context of NFV, a VM QQ508 may be a software implementation of a physical machine that runs programs as if they were executing on a physical, non-virtualized machine. Each of the VMs QQ508, and that part of hardware QQ504 that executes that VM, be it hardware dedicated to that VM and/or hardware shared by that VM with others of the VMs, forms separate virtual network elements. Still in the context of NFV, a virtual network function is responsible for handling specific network functions that run in one or more VMs QQ508 on top of the hardware QQ504 and corresponds to the application QQ502.

[0124] Hardware QQ504 may be implemented in a standalone network node with generic or specific components. Hardware QQ504 may implement some functions via virtualization. Alternatively, hardware QQ504 may be part of a larger cluster of hardware (e.g. such as in a data center or CPE) where many hardware nodes work together and are managed via management and orchestration QQ510, which, among others, oversees lifecycle management of applications QQ502. In some embodiments, hardware QQ504 is coupled to one or more radio units that each include one or more transmitters and one or more receivers that may be coupled to one or more antennas. Radio units may communicate directly with other hardware nodes via one or more appropriate network interfaces and may be used in combination with the virtual components to provide a virtual node with radio capabilities, such as a radio access node or a base station. In some embodiments, some signaling can be provided with the use of a control system QQ512 which may alternatively be used for communication between hardware nodes and radio units.

[0125] Figure 16 shows a communication diagram of a host QQ602 communicating via a network node QQ604 with a UE QQ606 over a partially wireless connection in accordance with some embodiments. Example implementations, in accordance with various embodiments, of the UE (such as a UE QQ112a of Figure 11 and/or UE QQ200 of Figure QQ2), network node (such as network node QQl lOa of Figure 11 and/or network node QQ300 of Figure QQ3), and host (such as host QQ116 of Figure 11 and/or host QQ400 of Figure QQ4) discussed in the preceding paragraphs will now be described with reference to Figure QQ6.

[0126] Like host QQ400, embodiments of host QQ602 include hardware, such as a communication interface, processing circuitry, and memory. The host QQ602 also includes software, which is stored in or accessible by the host QQ602 and executable by the processing circuitry. The software includes a host application that may be operable to provide a service to a remote user, such as the UE QQ606 connecting via an over-the-top (OTT) connection QQ650 extending between the UE QQ606 and host QQ602. In providing the service to the remote user, a host application may provide user data which is transmitted using the OTT connection QQ650. [0127] The network node QQ604 includes hardware enabling it to communicate with the host QQ602 and UE QQ606. The connection QQ660 may be direct or pass through a core network (like core network QQ106 of Figure 11) and/or one or more other intermediate networks, such as one or more public, private, or hosted networks. For example, an intermediate network may be a backbone network or the Internet.

[0128] The UE QQ606 includes hardware and software, which is stored in or accessible by UE QQ606 and executable by the UE’s processing circuitry. The software includes a client application, such as a web browser or operator-specific “app” that may be operable to provide a service to a human or non-human user via UE QQ606 with the support of the host QQ602. In the host QQ602, an executing host application may communicate with the executing client application via the OTT connection QQ650 terminating at the UE QQ606 and host QQ602. In providing the service to the user, the UE's client application may receive request data from the host's host application and provide user data in response to the request data. The OTT connection QQ650 may transfer both the request data and the user data. The UE's client application may interact with the user to generate the user data that it provides to the host application through the OTT connection QQ650.

[0129] The OTT connection QQ650 may extend via a connection QQ660 between the host QQ602 and the network node QQ604 and via a wireless connection QQ670 between the network node QQ604 and the UE QQ606 to provide the connection between the host QQ602 and the UE QQ606. The connection QQ660 and wireless connection QQ670, over which the OTT connection QQ650 may be provided, have been drawn abstractly to illustrate the communication between the host QQ602 and the UE QQ606 via the network node QQ604, without explicit reference to any intermediary devices and the precise routing of messages via these devices.

[0130] As an example of transmitting data via the OTT connection QQ650, in step QQ608, the host QQ602 provides user data, which may be performed by executing a host application. In some embodiments, the user data is associated with a particular human user interacting with the UE QQ606. In other embodiments, the user data is associated with a UE QQ606 that shares data with the host QQ602 without explicit human interaction. In step QQ610, the host QQ602 initiates a transmission carrying the user data towards the UE QQ606. The host QQ602 may initiate the transmission responsive to a request transmitted by the UE QQ606. The request may be caused by human interaction with the UE QQ606 or by operation of the client application executing on the UE QQ606. The transmission may pass via the network node QQ604, in accordance with the teachings of the embodiments described throughout this disclosure. Accordingly, in step QQ612, the network node QQ604 transmits to the UE QQ606 the user data that was carried in the transmission that the host QQ602 initiated, in accordance with the teachings of the embodiments described throughout this disclosure. In step QQ614, the UE QQ606 receives the user data carried in the transmission, which may be performed by a client application executed on the UE QQ606 associated with the host application executed by the host QQ602.

[0131] In some examples, the UE QQ606 executes a client application which provides user data to the host QQ602. The user data may be provided in reaction or response to the data received from the host QQ602. Accordingly, in step QQ616, the UE QQ606 may provide user data, which may be performed by executing the client application. In providing the user data, the client application may further consider user input received from the user via an input/output interface of the UE QQ606. Regardless of the specific manner in which the user data was provided, the UE QQ606 initiates, in step QQ618, transmission of the user data towards the host QQ602 via the network node QQ604. In step QQ620, in accordance with the teachings of the embodiments described throughout this disclosure, the network node QQ604 receives user data from the UE QQ606 and initiates transmission of the received user data towards the host QQ602. In step QQ622, the host QQ602 receives the user data carried in the transmission initiated by the UE QQ606.

[0132] In an example scenario, factory status information may be collected and analyzed by the host QQ602. As another example, the host QQ602 may process audio and video data which may have been retrieved from a UE for use in creating maps. As another example, the host QQ602 may collect and analyze real-time data to assist in controlling vehicle congestion (e.g., controlling traffic lights). As another example, the host QQ602 may store surveillance video uploaded by a UE. As another example, the host QQ602 may store or control access to media content such as video, audio, VR or AR which it can broadcast, multicast or unicast to UEs. As other examples, the host QQ602 may be used for energy pricing, remote control of non-time critical electrical load to balance power generation needs, location services, presentation services (such as compiling diagrams etc. from data collected from remote devices), or any other function of collecting, retrieving, storing, analyzing and/or transmitting data.

[0133] In some examples, a measurement procedure may be provided for the purpose of monitoring data rate, latency and other factors on which the one or more embodiments improve. There may further be an optional network functionality for reconfiguring the OTT connection QQ650 between the host QQ602 and UE QQ606, in response to variations in the measurement results. The measurement procedure and/or the network functionality for reconfiguring the OTT connection may be implemented in software and hardware of the host QQ602 and/or UE QQ606. In some embodiments, sensors (not shown) may be deployed in or in association with other devices through which the OTT connection QQ650 passes; the sensors may participate in the measurement procedure by supplying values of the monitored quantities exemplified above, or supplying values of other physical quantities from which software may compute or estimate the monitored quantities. The reconfiguring of the OTT connection QQ650 may include message format, retransmission settings, preferred routing etc.; the reconfiguring need not directly alter the operation of the network node QQ604. Such procedures and functionalities may be known and practiced in the art. In certain embodiments, measurements may involve proprietary UE signaling that facilitates measurements of throughput, propagation times, latency and the like, by the host QQ602. The measurements may be implemented in that software causes messages to be transmitted, in particular empty or ‘dummy’ messages, using the OTT connection QQ650 while monitoring propagation times, errors, etc.

[0134] Although the computing devices described herein (e.g., UEs, network nodes, hosts) may include the illustrated combination of hardware components, other embodiments may comprise computing devices with different combinations of components. It is to be understood that these computing devices may comprise any suitable combination of hardware and/or software needed to perform the tasks, features, functions and methods disclosed herein. Determining, calculating, obtaining or similar operations described herein may be performed by processing circuitry, which may process information by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored in the network node, and/or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination. Moreover, while components are depicted as single boxes located within a larger box, or nested within multiple boxes, in practice, computing devices may comprise multiple different physical components that make up a single illustrated component, and functionality may be partitioned between separate components. For example, a communication interface may be configured to include any of the components described herein, and/or the functionality of the components may be partitioned between the processing circuitry and the communication interface. In another example, non-computationally intensive functions of any of such components may be implemented in software or firmware and computationally intensive functions may be implemented in hardware.

[0135] In certain embodiments, some or all of the functionality described herein may be provided by processing circuitry executing instructions stored on in memory, which in certain embodiments may be a computer program product in the form of a non-transitory computer- readable storage medium. In alternative embodiments, some or all of the functionality may be provided by the processing circuitry without executing instructions stored on a separate or discrete device-readable storage medium, such as in a hard-wired manner. In any of those particular embodiments, whether executing instructions stored on a non-transitory computer-readable storage medium or not, the processing circuitry can be configured to perform the described functionality. The benefits provided by such functionality are not limited to the processing circuitry alone or to other components of the computing device, but are enjoyed by the computing device as a whole, and/or by end users and a wireless network generally.

[0136] Further definitions and embodiments are discussed below.

[0137] In the above-description of various embodiments of present inventive concepts, it is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of present inventive concepts. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which present inventive concepts belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0138] When an element is referred to as being “connected”, “coupled”, “responsive”, or variants thereof to another element, it can be directly connected, coupled, or responsive to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected”, “directly coupled”, “directly responsive”, or variants thereof to another element, there are no intervening elements present. Like numbers refer to like elements throughout. Furthermore, “coupled”, “connected”, “responsive”, or variants thereof as used herein may include wirelessly coupled, connected, or responsive. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Well-known functions or constructions may not be described in detail for brevity and/or clarity. The term “and/or” (abbreviated “/”) includes any and all combinations of one or more of the associated listed items.

[0139] It will be understood that although the terms first, second, third, etc. may be used herein to describe various elements/operations, these elements/operations should not be limited by these terms. These terms are only used to distinguish one element/operation from another element/operation. Thus a first element/operation in some embodiments could be termed a second element/operation in other embodiments without departing from the teachings of present inventive concepts. The same reference numerals or the same reference designators denote the same or similar elements throughout the specification.

[0140] As used herein, the terms “comprise”, “comprising”, “comprises”, “include”, “including”, “includes”, “have”, “has”, “having”, or variants thereof are open-ended, and include one or more stated features, integers, elements, steps, components or functions but does not preclude the presence or addition of one or more other features, integers, elements, steps, components, functions or groups thereof. Furthermore, as used herein, the common abbreviation “e.g ”, which derives from the Latin phrase “exempli gratia,” may be used to introduce or specify a general example or examples of a previously mentioned item, and is not intended to be limiting of such item. The common abbreviation “i.e ”, which derives from the Latin phrase “id est,” may be used to specify a particular item from a more general recitation.

[0141] Example embodiments are described herein with reference to block diagrams and/or flowchart illustrations of computer-implemented methods, apparatus (systems and/or devices) and/or computer program products. It is understood that a block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions that are performed by one or more computer circuits. These computer program instructions may be provided to a processor circuit of a general purpose computer circuit, special purpose computer circuit, and/or other programmable data processing circuit to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, transform and control transistors, values stored in memory locations, and other hardware components within such circuitry to implement the functions/acts specified in the block diagrams and/or flowchart block or blocks, and thereby create means (functionality) and/or structure for implementing the functions/acts specified in the block diagrams and/or flowchart block(s).

[0142] These computer program instructions may also be stored in a tangible computer- readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instructions which implement the functions/acts specified in the block diagrams and/or flowchart block or blocks. Accordingly, embodiments of present inventive concepts may be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.) that runs on a processor such as a digital signal processor, which may collectively be referred to as “circuitry,” “a module” or variants thereof. [0143] It should also be noted that in some alternate implementations, the functions/acts noted in the blocks may occur out of the order noted in the flowcharts. For example, two blocks shown in succession may in fact be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Moreover, the functionality of a given block of the flowcharts and/or block diagrams may be separated into multiple blocks and/or the functionality of two or more blocks of the flowcharts and/or block diagrams may be at least partially integrated. Finally, other blocks may be added/inserted between the blocks that are illustrated, and/or blocks/operations may be omitted without departing from the scope of inventive concepts. Moreover, although some of the diagrams include arrows on communication paths to show a primary direction of communication, it is to be understood that communication may occur in the opposite direction to the depicted arrows.

[0144] Many variations and modifications can be made to the embodiments without substantially departing from the principles of the present inventive concepts. All such variations and modifications are intended to be included herein within the scope of present inventive concepts. Accordingly, the above disclosed subject matter is to be considered illustrative, and not restrictive, and the examples of embodiments are intended to cover all such modifications, enhancements, and other embodiments, which fall within the spirit and scope of present inventive concepts. Thus, to the maximum extent allowed by law, the scope of present inventive concepts are to be determined by the broadest permissible interpretation of the present disclosure including the examples of embodiments and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

A listing of example embodiments of the present disclosure is provided below:

1. A digital pre-distortion method for pre-distorting an input signal (e.g., X#0 in FIG. 6) for amplification by a power power amplifier (e.g., PA#0 in Fig. 6) before transmission through at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8), the method comprising:

(a) obtaining (1000) the input signal (e.g., X#0 in FIG. 6);

(b) for a first stage of predistortion (e.g., PD#0 in Fig. 4), processing (1002) a discrete amplitude of the input signal through a first set of addressing-look-up tables, Addr-LUTs, (e.g., Addr-LUT#0, Addr-LUT#1, Addr-LUT#A) or first set of address mapping functions for a corresponding first set of data look-up tables, Data-LUTs, (e.g., Data-LUT#0, Data-LUT#1, Data-LUT#A) to output a set of mapped sampled amplitudes, wherein each of the Data-LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier (e.g., PA#0 in Fig. 6);

(c) multiplying (e.g., 508, 518, 528 in Fig. 5, 1004 in Fig. 10) a set of the input signals by a corresponding set of complex coefficients retrieved from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digitally predistorted input signals;

(d) generating (1006) a combined digitally pre-distorted input signal based on combining (e.g., 530a, 530b) the intermediate digitally pre-distorted input signals of the set; and

(e) providing (1008) the combined digitally pre-distorted input signal to an analog front end (610) for conditioning before amplification by the power amplifier (e.g., PA#0 in Fig. 6) and transmission through the at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8).

2. The digital pre-distortion method of Embodiment 1, wherein: each of the first set of Addr-LUTs for each of the first set of Data-LUTs contains a data structure mapping a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set; each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

3. The digital pre-distortion method of Embodiment 2, wherein: for each of the first set of Addr-LUTs for each of the first set of Data-LUTs, the data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set correspond to data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes, different ones of the data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) contain values defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

4. The digital pre-distortion method of Embodiment 1, wherein: each of the first set of address mapping functions for each of the first set of Data-LUTs functionally maps a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set; each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

5. The digital pre-distortion method of Embodiment 4, wherein: for each of the first set of address mapping functions for each of the first set of Data-LUTs, different ones of the first set of address mapping functions are used for different sub-ranges of possible discrete amplitudes of the input signal to functionally map to different sub-ranges of complex coefficients of the set, wherein the different ones of the first set of address mapping functions are defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

6. The digital pre-distortion method of any of Embodiments 1 to 5, further comprising: adapting (604) the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier (e.g., PA#0 in Fig. 6).

7. The digital pre-distortion method of Embodiment 6, wherein the adapting (604) the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, comprises: adapting (604) the gain values of the first set of Data-LUTs based on amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6).

8. The digital pre-distortion method of Embodiment 6, wherein the adapting (604) the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, comprises: adapting (604) the gain values of of the first set of Data-LUTs based on comparison of the amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6) to the discrete amplitude of the input signal.

9. The digital pre-distortion method of any of Embodiments 1 to 8, further comprising: repeating the method of (b) and (c) for a plurality number N of sequential stages of predistortion (e.g., PD#1 through PD#N in Fig. 4) including providing the set of intermediate digitally pre-distorted input signals which is generated by one stage of predistortion in method (c) as the set of input signals which is multiplied by the method (c) in a next sequential one of the sequential stages of predistortion, wherein each of the N sequential stages of predistortion accesses a respective different one of N sets of Addr-LUTs or different one of N sets of address mapping functions and corresponding one of N sets of Data-LUTs; and using the set of intermediate digitally pre-distorted input signals generated by the Nth sequential stage of predistortion (e.g., PD#N) to generate the combined digitally pre-distorted input signal in the method (d).

10. The digital pre-distortion method of any of Embodiment 1 to 9, wherein the method is performed by a radio access network node.

11. The digital pre-distortion method of any of Embodiment 1 to 9, wherein the method is performed by a user equipment.

12. A digital pre-distorter (600) for pre-distorting an input signal (e.g., X#0 in FIG. 6) for amplification by a power power amplifier (e.g., PA#0 in Fig. 6) before transmission through at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8), the digital pre-distorter (600) adapted to:

(a) obtain the input signal (e.g., X#0 in FIG. 6);

(b) for a first stage of predistortion (e.g., PD#0 in Fig. 4), process a discrete amplitude of the input signal through a first set of addressing-look-up tables, Addr-LUTs, (e.g., Addr-LUT#0, Addr-LUT#1, Addr-LUT#A) or first set of address mapping functions for a corresponding first set of data look-up tables, Data-LUTs, (e.g., Data-LUT#0, Data-LUT#1, Data-LUT#A) to output a set of mapped sampled amplitudes, wherein each of the Data-LUTs of the first set comprises a set of complex coefficients which inversely characterize nonlinear gain characteristics of the power amplifier (e.g., PA#0 in Fig. 6);

(c) multiply a set of the input signals by a corresponding set of complex coefficients retrieved from the set of Data-LUTs using the set of mapped sampled amplitudes as look-up addresses, to generate a set of intermediate digitally pre-distorted input signals;

(d) generate a combined digitally pre-distorted input signal based on combining (e.g., 530a, 530b) the intermediate digitally pre-distorted input signals of the set; and

(e) provide the combined digitally pre-distorted input signal to an analog front end (610) for conditioning before amplification by the power amplifier (e.g., PA#0 in Fig. 6) and transmission through the at least one antenna (e.g., antenna(s) 640 in Figs. 6, 7, 8). 13. The digital pre-distorter (600) of Embodiment 12, wherein: each of the first set of Addr-LUTs for each of the first set of Data-LUTs contains a data structure mapping a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set; each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

14. The digital pre-distorter (600) of Embodiment 13, wherein: for each of the first set of Addr-LUTs for each of the first set of Data-LUTs, the data structures mapping the range of possible discrete amplitudes of the input signal to the range of mapped sampled amplitudes of the set correspond to data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) mapping sub-ranges of possible discrete amplitudes of the input signal to sub-ranges of the mapped sampled amplitudes, different ones of the data structure regions (e.g., Region#0, Region#l, Region#N in Fig. 3A) contain values defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal.

15. The digital pre-distorter (600) of Embodiment 12, wherein: each of the first set of address mapping functions for each of the first set of Data-LUTs functionally maps a range of possible discrete amplitudes of the input signal to a range of mapped sampled amplitudes of the set; each of the first set of Data-LUTs contains a data structure mapping the range of mapped sampled amplitudes to a range of complex coefficients of the set.

16. The digital pre-distorter (600) of Embodiment 15, wherein: for each of the first set of address mapping functions for each of the first set of Data-LUTs, different ones of the first set of address mapping functions are used for different sub-ranges of possible discrete amplitudes of the input signal to functionally map to different sub-ranges of complex coefficients of the set, wherein the different ones of the first set of address mapping functions are defined based on nonlinear gain characteristics of the power amplifier when amplifying signals generated based on the corresponding sub-range of possible discrete amplitudes of the input signal. 17. The digital pre-distorter (600) of any of Embodiments 12 to 16, wherein the digital predistorter (600) is further adapted to: adapt the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier (e.g., PA#0 in Fig. 6).

18. The digital pre-distorter (600) of Embodiment 17, wherein the adaptation of the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, by the digital pre-distorter (600) comprises: adapting (604) the gain values of the first set of Data-LUTs based on amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6).

19. The digital pre-distorter (600) of Embodiment 17, wherein the adaptation of the complex coefficients of the first set of Data-LUTs based on a feedback signal from an output of the power amplifier, by the digital pre-distorter (600) comprises: adapting (604) the gain values of the first set of Data-LUTs based on comparison of the amplitude of the feedback signal from the output of the power amplifier (e.g., PA#0 in Fig. 6) to the discrete amplitude of the input signal.

20. The digital pre-distorter (600) of any of Embodiments 12 to 19, wherein the digital pre- distorter (600) is further adapted to: repeat the operations of (b) and (c) for a plurality number N of sequential stages of predistortion (e.g., PD#1 through PD#N in Fig. 4) including providing the set of intermediate digitally pre-distorted input signals which is generated by one stage of predistortion in operation (c) as the set of input signals which is multiplied by the operation (c) in a next sequential one of the sequential stages of predistortion, wherein each of the N sequential stages of predistortion accesses a respective different one of N sets of Addr-LUTs or different one of N sets of address mapping functions and corresponding one of N sets of Data-LUTs; and use the set of intermediate digitally pre-distorted input signals generated by the Nth sequential stage of predistortion (e.g., PD#N) to generate the combined digitally pre-distorted input signal in the operation (d).

21. The digital pre-distorter (600) of any of Embodiment 12 to 20, wherein the digital pre- distorter (600) is part of a radio access network node. 22. The digital pre-distorter (600) of any of Embodiment 12 to 20, wherein the digital predistorter (600) is part of a user equipment.