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Title:
ADHESIVE TAPE FOR SEMICONDUCTOR PROCESSING, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2018/066480
Kind Code:
A1
Abstract:
[Problem] To provide an adhesive tape for semiconductor processing which can suppress chip cracking even when used in DBG, particularly LDBG. [Solution] This adhesive tape for semiconductor processing comprises a substrate which has a Young's modulus at 23°C of greater than or equal to 1000 MPa, and an adhesive layer which is provided on at least one surface of said substrate. Defining the thickness of the adhesive layer as (N) [μm] and the creep amount as (C) [μm], the product (N)×(C) of (N) and (C) is greater than or equal to 500 at 30°C and less than or equal to 9000 at 60°C.

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Inventors:
AIZAWA KAZUTO (JP)
MAEDA JUN (JP)
Application Number:
PCT/JP2017/035599
Publication Date:
April 12, 2018
Filing Date:
September 29, 2017
Export Citation:
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Assignee:
LINTEC CORP (JP)
International Classes:
H01L21/301; C09J4/02; C09J133/00; C09J201/00; H01L21/304; H01L21/683
Domestic Patent References:
WO2014203792A12014-12-24
Foreign References:
JP2015183008A2015-10-22
JP2008214386A2008-09-18
Attorney, Agent or Firm:
MAEDA & SUZUKI (JP)
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