The invention relates to a method for acquiring the data pro ^¬ vided by a sensor system where the status of the algorithm triggers the acquisition of the sensor data and a computer system executing said method.

BACKGROUND

Digital camera image recording is currently performed at a static frame rate. Each frame is converted into a data token, thereby providing a data stream to the processor consisting of discrete date tokens. At the same time algorithms for ac ^¬ quiring the data tokens of the data stream will have an ac ^¬ quisition rate that is basically independent of the frame rate. This acquisition rate will, for example, depend from the way the algorithm has been coded and the speed of the processor on which the algorithm is run.

As a consequence it is likely that the following two situa ^¬ tions occur: A) The algorithm can be faster than the camera, forcing the algorithm to remain idle until the next frame is provided by the sensor. B) The algorithm is slower than the camera and as a consequence a frame which is "old" (up to 1/framerate old) will be processed and after this processing step the algorithm has to wait for the next frame. In order not to lose frames the frames not yet processed need to be buffered, for example, in a memory of the system. Accord ^¬ ingly, not all resources available for the processing of the frames are used, thereby wasting processing capacities or the most-up-to date information is not processed. Previous solutions to this problem usually attempt to opti ^¬ mize the usage of the computer memory which is utilized to buffer the frames or to optimize the processing time that is allocated to the algorithm.

Accordingly, it is an object of the present invention to pro ^¬ vide a computer system and method that optimizes the interac ^¬ tion of a processor and a sensor system that omits the requirement of extensive memory or processor capacity usage.

SUMMARY OF THE INVENTION

This object is solved by the computer system comprising the features of claim 1.

Accordingly, in a first aspect of the invention, a computer system is provided comprising:

a sensor system configured to acquire a stream of signals from the environment at a sampling rate thereby providing a data stream consisting of data tokens each token correspond ^¬ ing to an acquired signal of the stream of signals;

a processor configured to execute an algorithm for continu ^¬ ously acquiring the data stream consisting of data tokens, wherein the algorithm has an acquisition rate for acquiring the data tokens of the data stream;

wherein the processor is configured to provide instructions to the sensor system to adapt the sampling rate to the acqui ^¬ sition rate of the algorithm.

Since the sensor system is only trigged to acquire a further signal when the algorithm is ready, the sampling rate of the sensor system and the acquisition rate of the processor are synchronized and the above described time delay are avoided. According to the invention the algorithm has three different states, a first status indicating that the algorithm is ready to acquire a signal of the stream of signals and a second status indicating that the algorithm is not ready to acquire a signal of the stream of signals.

Furthermore, according to the invention the third status in ^¬ dicates that the algorithm is close to being ready for ac ^¬ quiring a signal of the stream of signals to account for ac ^¬ quisition latencies of the sensor system.

This embodiment has the particular advantage that the sam ^¬ pling rate of the sensor system and the acquisition rate of the algorithm can even be further synchronized because the sampling of the new signal can be completed and provided to the algorithm exactly at that time when the algorithm is ca ^¬ pable of processing a new incoming data token.

In an embodiment of the invention the sensor system may be configured to provide information on the expected acquisition time to the processor.

Moreover, the processor is configured to read the states and to trigger the acquisition of the signal at the sensor system upon determining that the algorithm is in the third status. For this the processor uses the information on the expected acquisition time and the information on the time until the algorithm will be in the first status. By this the algorithm receives the data token precisely when the algorithm enters the first status. In a further embodiment the processor may be configured to use the expected acquisition time to determine when the algo ^¬ rithm will be in the first status.

In a further embodiment the sensor system may be an image re ^¬ cording device, a sound recording device, a temperature re ^¬ cording device, a recording device for the chemical composi ^¬ tion of the environment, a device for light detection and ranging (LIDAR) , a radio detection and ranging (RADAR) device, ultrasonic sensors, and other sensors relevant for au ^¬ tomotive applications.

In a further embodiment the sensor system may be an image re ^¬ cording device and the sampling rate of the image recording device is the frame rate of the image recording device.

In a further embodiment the processor of the computer system may be a central processing unit (CPU) , a graphical pro ^¬ cessing unit (GPU) , an application-specific integrated cir ^¬ cuit (ASIC) , field-programmable gate array (FPGA) or a combi ^¬ nation thereof.

In a second aspect the invention relates to a computer system implemented method for acquiring the data stream of a sensor system comprising:

executing on a processor an algorithm for continuously acquiring a data stream consisting of data tokens, wherein the algorithm has an acquisition rate for acquiring the data tokens ;

the processor providing instructions to the sensor system to adapt the sampling rate of the sensor system to the acquisi ^¬ tion rate of the algorithm; the sensor system acquiring a stream of signals from the environment at the sampling rate, thereby providing the data stream consisting of data tokens each token corresponding to an acquired signal of the stream of signals.

According to the second aspect of the invention, the algo ^¬ rithm has three different states, a first status indicating that the algorithm is ready to acquire a signal of the stream of signals and a second status indicating that the algorithm is not ready to acquire a signal of the stream of signals.

Moreover, according to the second aspect of the invention, the third status indicates that the algorithm is close to be ^¬ ing ready for acquiring a signal of the stream of signals to account for acquisition latencies of the sensor system.

Furthermore, according to the second aspect of the invention, the sensor system provides information of the expected acqui ^¬ sition time to the processor.

Moreover, the processor reads the states and triggers the ac ^¬ quisition of the signal at the sensor system upon determining that the algorithm is in the third status. For this the pro ^¬ cessor uses the information on the expected acquisition time and the information on a time until the algorithm will be in the first status. By this the algorithm receives the data to ^¬ ken precisely when the algorithm enters the first status.

BRIEF DESCRIPTION OF THE FIGURES

Figure 1 illustrates a computer system comprising a processor and a sensor system. Figure 2 illustrates a method for algorithm trigged sensor data acquisition.

DETAILED DESCRIPTION OF THE INVENTION

Figure 1 shows a computer system 100 comprising a processor 101 and a sensor system 102. The processor 101 and the sensor system 102 can be provided within the same casing or can be provided in separated casings. The processor 101 and the sen ^¬ sor system 102 can be operably linked by any connection suitable to transfer data between the processor 101 and the sensor, like a data cable (e.g a local area network or a data bus, e.g. a USB bus) or a wireless connection (e.g. a Wifi network or Bluetooth) . The computer system 100 may comprise or/and be operably connected to a memory device for storing the data output by the processor 101 or the sensor system 102. The computer system 100 may comprise as the processor 101 a central processing unit, a graphical processing unit, an application-specific integrated circuit (ASIC) , field-pro ^¬ grammable gate array (FPGA) or a combination thereof.

As depicted in Fig. 2 the processor 101 executes the algo ^¬ rithm that acquires the data stream provided by the sensor system 102 (S201) . The sensor system 102 is a device that preferably is capable of transforming an analogue signal pro ^¬ vided by the environment into a digital signal. The sensor system 102 acquires the analogue signal at a particular sam ^¬ pling rate, providing for each sampling of the analogue input a discrete digital data package (data token) after conver ^¬ sion. For this purpose the sensor system 102 comprises a de ^¬ vice for converting an analogue signal to a digital signal (e.g. an optoelectronic sensor in the case of a digital cam ^¬ era) . Each sampling step can endure for a specific time length that is adjustable by the user, is predetermined, or is automati ^¬ cally determined in dependency from external factors. For ex ^¬ ample, for a digital camera the time length of the sampling step can depend from the light level in the environment of the sensor. The length of the time length of the sampling step determines the maximum sampling rate, with the maximum sampling rate being a time period divided by the length of the sampling step.

Accordingly, the computer system 100 or the sensor system 102 may also be configured to determine the level of such an ex ^¬ ternal factor. This can be achieved by the device for con ^¬ verting an analogue signal to a digital signal of the sensor system 102 itself or by an additional sensor system 102 that is capable of determining a digital value for the external factor .

Returning to the algorithm, the algorithm is a computer program for processing the data stream comprising the data tokens received by the sensor system 102. The data stream contains the raw data provided by the sensor system 102. This raw data can be processed by the algorithm into a different (for example, a compressed) format that is different from the format of the raw data, for example, a format requiring a lower amount of bits.

The algorithm processes the data stream continuously and se ^¬ quentially (data token by data token) and thus the algorithm has a certain acquisition rate for processing new incoming data tokens of the data streams. This acquisition rate can depend from various factors. For example, the code of the al- gorithm may require that each data token is submitted to par ^¬ ticular processing steps each requiring a certain amount of time. Thus, during the time one incoming data token is pro ^¬ cessed the algorithm is not capable of processing a further incoming data token. This code specific limitation of the al ^¬ gorithm may further be dependent on the processing time that is allocated to the algorithm by the processor 101 on which the algorithm is executed. For example, if a further process, that is not the algorithm for acquiring the incoming data stream, is executed on the same processor 101, the processor 101 may reduce the maximal processing time allocated to the algorithm for acquiring the incoming data stream.

In addition, the processor 101 will inherently have a certain maximal processing speed that may also limit the rate at which the execution of the algorithm for acquiring the incoming data stream is performed.

Therefore, the algorithm may have a status where it is ready to acquire a new incoming data token and a status where it is not ready to acquire a new incoming data token. This status information may be provided by the algorithm itself or by a further process being executed on the processor 101 which determines the status of the algorithm.

The processor 101 can read these states and upon determining that the algorithm is ready sends instructions to the sensor system 102 to acquire a signal from the environment S202, thereby triggering the acquisition of a new signal by the sensor system 102, and to provide a new data token after digital conversion of the signal S203. Preferably, the processor 101 triggers the acquisition of the signal at the sensor sys ^¬ tem 102 upon determining that the algorithm is in the third status . The reading of those states by the processor 101 es ^¬ pecially occurs in a recursive way and depending on the sta ^¬ tus of the algorithm the acquisition of a new signal by the sensor system 102 is either triggered or not. The algorithm is hereby preferably processing the incoming data tokens con ^¬ tinuously.

This approach has the advantage that no data token is send to the algorithm executed on the processor 101 when the algo ^¬ rithm is not ready. In this way the sampling rate of the sen ^¬ sor system 102 is no longer at a predetermined fixed value, but can vary depending on the instructions send by the pro ^¬ cessor 100 and is thus adapted to the acquisition rate of the algorithm. In this way no processing time is wasted and no additional memory is required to provide a preliminary stor ^¬ age place for the incoming data stream.

The first status which indicates that the algorithm is ready may also indicate that the algorithm is close to being ready for acquiring a signal of the stream of signals. This may also be considered to represent a third status and this third status may also be accompanied with information about the time period until the algorithm may be ready. This has the advantage that acquisition latencies of the sensor system 102 can be accounted for. For example, the processor 101 may be provided with the information that the acquisition of a further signal and the conversion of this signal into a data to ^¬ ken may take a period t _A (signal acquisition period) . A pro ^¬ cess executed on the processor 101 may read that the algo ^¬ rithm is in a third status and the processor 100 may be pro ^¬ vided with the information that the algorithm may be ready in a period of t _R (period until algorithm is ready) . Then it can be calculated by the process executed on the processor 101 that after a period t _t = t _R - t _A ("period until triggering is executed") the algorithm will be in the first state and thus trigger the acquisition of the signal at the sensor system 102 after expiry of the period t _t . To ensure that the various events of the claimed method and within the claimed system are synchronized, the computer system 100 can also comprise a clock structure for synchronizing the processes being executed in the computer system 100.

As discussed above, the acquisition latencies may also depend from the determination of an external factor (e.g. the level of light in the case of an optical sensor) and thus may be accounted for when determining the presence of a third sta ^¬ tus .

The disclosed sensor system 102 may be any sensor system 102 that is capable of sequentially and also continuously acquir ^¬ ing an external (e.g. analogue) signal from the environment and converting this signal into a digital data stream con ^¬ sisting of data tokens. Thus, the sensor system 102 may be an image recording device, a sound recording device, a tempera ^¬ ture recording device, or a recording device for the chemical composition of the environment. An image recording device may be a digital camera or digital video camera. The image re ^¬ cording device may comprise a charge-coupled device (CCD) sensor or a complementary metal-oxide-semiconductor (CMOS) . A temperature recording device may measure the resistance in a metal in a temperature dependent manner (thermistor, e.g. Positive or Negative Temperature Coefficient Thermistor) and comprise means to convert these measurements into a digital data stream. A sound recording device may be any form of microphone suitable for measuring sound waves and converting them into a digital signal. A recording device for the chemi ^¬ cal composition of the environment may be for example a pH meter or a potentiometer, or any other device suitable to measure in a time dependent manner a chemical factor in the environment .

The herein disclosed computer system 100 may have a number of applications .

It may be comprised in any form of vehicle, e.g. in an auto ^¬ mobile (e.g. a car or a truck), an aircraft or a ship. It may be comprised in and/or operably connected to an Advanced Driver Assistance System (ADAS) which may be comprised in any form of vehicle as described above. Particularly preferred is the use of a computer system 100 comprising an image recording device that is used as a front, side, or rear camera in an automobile.