Title:
AMPLIFIER CIRCUIT, LATCH CIRCUIT, AND SENSING DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/031016
Kind Code:
A1
Abstract:
The present invention raises the output gain of a latch circuit. Provided are a first circuit, a second circuit, and a latch circuit having first to fourth transistors. The latch circuit has a first input/output terminal and a second input/output terminal. The first circuit and the second circuit function as current sources. When the third transistor is in an OFF state and the fourth transistor is in an ON state, a first input signal imparted to the first input/output terminal and a second input signal imparted to the second input/output terminal are imparted in the latch circuit. When the third transistor is in an ON state and the fourth transistor is in an OFF state, a reverse signal of the first input signal is outputted to the first input/output terminal in the latch circuit and a reverse signal of the second input signal is outputted to the second input/output terminal in the latch circuit. The first circuit and the second circuit raise the output gain of the latch circuit.
Inventors:
TAKAHASHI KEI (JP)
YAKUBO YUTO (JP)
INOUE HIROKI (JP)
YAKUBO YUTO (JP)
INOUE HIROKI (JP)
Application Number:
PCT/IB2019/056434
Publication Date:
February 13, 2020
Filing Date:
July 29, 2019
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H03F3/45; G05F1/56; H01L29/786; H03K3/356; H01M10/48
Foreign References:
| JP2015507436A | 2015-03-05 | |||
| JPS5148228A | 1976-04-24 | |||
| JP2017192124A | 2017-10-19 | |||
| JP2010147992A | 2010-07-01 | |||
| JPH10163773A | 1998-06-19 |
Other References:
BEHZAD RAZAVI: "Design of analog CMOS integrated circuits", 2003, MCGRAW-HILL, ISBN: 4-621-07221-8, pages: 537 - 539
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