Title:
AMPLIFIER CIRCUIT FOR READING DATA AND SEMICONDUCTOR STORAGE DEVICE PROVIDED WITH SUCH AMPLIFIER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2007/077625
Kind Code:
A1
Abstract:
[PROBLEMS] To provide an amplifier circuit, which is for reading data stored
in a memory cell having a magnetoresistive element, a resistance change memory
element, a phase change memory element and the like, and can reduce a memory cell
forming area, and to provide a semiconductor storage device provided with such
amplifier circuit. [MEANS FOR SOLVING PROBLEMS] An amplifier circuit (1301)
for reading data is provided with first to third data clamp sections (1211, 1212,
1213) connected in parallel, and first to third reference clamp sections (1261,
1262, 1263) connected in parallel. A first data clamp voltage (DVc1) to be applied
to the first data clamp section (1211), a second data clamp voltage (DVc2) to be
applied to the second data clamp section (1212) and a third data clamp voltage
(DVc3) to be applied to the third data clamp section (1213) are set at different
voltage levels.
Inventors:
IWASA HIROSHI (JP)
Application Number:
PCT/JP2006/300035
Publication Date:
July 12, 2007
Filing Date:
January 05, 2006
Export Citation:
Assignee:
FUJITSU LTD (JP)
IWASA HIROSHI (JP)
IWASA HIROSHI (JP)
International Classes:
G11C11/15
Foreign References:
| JP2003297072A | 2003-10-17 |
Attorney, Agent or Firm:
MORIOKA, Masaki (Iwai Bldg. 4th Floor 16-5, Shimizu 1-chom, Suginami-ku Tokyo 33, JP)
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