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Patent Searching and Data

Document Type and Number:
WIPO Patent Application WO/2019/208122
Kind Code:
An amplifier circuit comprising: a first amplifying circuit that includes a chopper circuit and amplifies first differential signals input to a first input terminal and a second input terminal, thereby outputting second differential signals; and a second amplifying circuit that amplifies the second differential signals and outputs a single-end signal. The second amplifying circuit comprises: a first circuit that includes a first transistor and a second transistor, is connected to the first amplifying circuit such that the second differential signals are input to the gate of the first transistor and the gate of the second transistor, and converts the second differential signals into a current flowing through a first node connected to the first transistor and into a current flowing through a second node connected to the second transistor; and a second circuit that negatively feeds back the voltage at the first node such that the difference between the voltage at the first node and the voltage at the second node becomes small. The second amplifying circuit outputs the single-end signal from the second node.

Application Number:
Publication Date:
October 31, 2019
Filing Date:
April 02, 2019
Export Citation:
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PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. (1-61, Shiromi 2-chome Chuo-ku, Osaka-sh, Osaka 07, 〒5406207, JP)
International Classes:
H03F3/387; H03F3/45; H04N5/378
Attorney, Agent or Firm:
KAMATA Kenji et al. (1-61, Shiromi 2-chome, Chuo-ku, Osaka-sh, Osaka 07, 〒5406207, JP)
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