OPTICAL COMMUNICATION DEVICE

TECHNICAL FIELD

The present invention relates to the field of optical communication technology and in particular to an amplifier for use in an optical communication device and an operating method of said amplifier.

BACKGROUND

Conventional transmitters for high speed optical communication are basically implemented by cascading three blocks as shown in Fig. 8. The first block illustrates a digital source, which usually provides a differential signal in order to improve speed and quality compared to a conventional signal. The second block illustrates a driver amplifier, which is used to increase a power level of the signal. The third block illustrates an electro-optical modulator, which transduces an electrical signal to an optical signal, which is to be transferred in e.g. a fiber wire.

In a solution of a conventional transmitter, the electrooptical modulator, which also can be an electro-absorption modulated laser (EML), requires a DC voltage and a single-ended input signal. In such a scenario, a differential input / single-ended output amplifier is required to implement the optical transmitter. Moreover, an output DC coupled driver amplifier is of interest, in order to avoid the use of a bias-tee, because this is very area consuming and limits an integration capability. Finally, if the adopted driver amplifier shows a matched output impedance, the electro-optical module is less susceptible to signal degradation because the matched output impedance of the driver amplifier absorbs reflections coming from an interconnection between the driver amplifier and the electro -optical modulator, such as from bonding wires and bonding pads. This aspect is of high importance to achieve optical communications with high speed and high data rate.

In conclusion, driver amplifiers having high performance and showing properties such as differential input / single-ended output, DC coupled output and a matched output impedance, are one of the key components to achieve very high speed and highly integrated transmitters for optical communication.

Conventional solutions to realize driver amplifiers with these properties can be divided in three groups: with lossy termination; with active termination; single-ended push-pull. The disadvantages of conventional solutions are now exemplary described in view of an example amplifier with active termination.

Conventional driver amplifiers with active termination are conventionally used to realize a differential-input, DC coupled, single-ended output amplifier with matched output termination through active termination.

It has to be noted that none of the conventional solutions is based on complementary technology in a part of the amplifier that is operating at high frequency. This is because p-channel field- effect transistors (FETs) and pnp bipolar junction transistors (BJTs) have a low cut-off frequency. As a consequence, they cannot be used to implement driver amplifiers that have to reach a high frequency range, as it is required in optical communication systems.

As a result, there is a need for a driver amplifier that overcomes the disadvantages listed above.

SUMMARY

In view of the above-mentioned problems and disadvantages, the present invention aims to improve the conventional driver amplifier. The amplifier according to the present invention allows for maximizing the performance of transmitters for optical communications.

More specifically, an amplifier for use in an optical communication device is provided that includes an amplifying stage, an impedance matching stage and a voltage controller (also indicated in the following as voltage control unit). Based on a received differential input signal, the voltage control unit generates a first control signal for controlling the amplifying stage and a second control signal for controlling the impedance matching stage. A ratio between the first control signal and the second control signal can be of predefined value, which helps to overcome the disadvantages mentioned above. More specifically the amplifier according to the present invention has the following advantages in view of the conventional solutions:

1. No output power dissipation: The amplifier according to the present invention does not dissipate any portion of output power during transmission of a signal as it happens in conventional solutions based on lossy termination and single-ended push-pull. As a consequence, the proposed solution allows for maximizing gain and output voltage with minimum DC power consumption.

2. Linear operation: With respect to conventional solutions based on active termination, the amplifier according to the present invention can be used both for switching mode and linear amplifiers.

3. Instantaneous response: With respect to conventional solutions based on active termination, the amplifier according to the present invention does not need time to present the matched output impedance because it does not include op-amps in the circuit.

4. High integration level: With respect to conventional solutions based on active termination, the proposed scheme can be easily implemented in GaAs or GaN MMIC technologies, because it does not include op-amps in the circuit.

The object of the present invention is achieved by the solution provided in the enclosed independent claims. Advantageous implementations of the present invention are further defined in the dependent claims.

A first aspect, the present invention provides an amplifier for use in an optical communication device, the amplifier comprising: an amplifying stage; an impedance matching stage connected to the amplifying stage; and a voltage control unit configured to generate, based on a received differential input signal, a first control signal for controlling the amplifying stage and a second control signal for controlling the impedance matching stage, wherein a ratio between the first control signal and the second control signal has a predefined value.

In an implementation form of the amplifier according to the first aspect, a ratio between an amplitude of the first control signal and an amplitude of the second control signal can relate to a voltage gain of the amplifying stage. In a further implementation form of the amplifier according to the first aspect, the amplifying stage can comprise a first transistor and the impedance matching stage can comprise a second transistor and the first control signal and the second control signal can be out of phase.

In a further implementation form of the amplifier according to the first aspect, the amplitude of the first control signal can be proportional to the amplitude of the second control signal and the first control signal and the second control signal can be out of phase by 180 degrees.

In a further implementation form of the amplifier according to the first aspect, the voltage control unit can comprise a first voltage control circuit (also indicated as first voltage control means in the following) and a second voltage control circuit (also indicated as second voltage control means), wherein the first voltage control means can be configured to output the first control signal according to the differential input signal, and wherein the second voltage control means can be configured to output the second control signal according to the differential input signal.

In a further implementation form of the amplifier according to the first aspect, the first voltage control means can comprise a first resistor, and the second voltage control means can comprise a second resistor, and the voltage control unit can further be configured to define the ratio of the first control signal and the second control signal according to a ratio of the first resistor and the second resistor.

In a further implementation form of the amplifier according to the first aspect, the first voltage control means can comprise a third transistor, and the second voltage control means can comprise a fourth transistor, and the voltage control unit can further be configured to define the ratio of the first control signal and the second control signal according to a ratio of the third transistor and the fourth transistor.

In a further implementation form of the amplifier according to the first aspect, the ratio of the first resistor and the second resistor can be configured according to a type and/or configuration of the first transistor and the second transistor, and/or the ratio of the third transistor and the fourth transistor can be configured according to a type and/or configuration of the first transistor and the second transistor. In a further implementation form of the amplifier according to the first aspect, the voltage control unit can comprise a current source, and the third transistor, for instance an input port of the third transistor, can be connected to the current source and the fourth transistor, for instance an input port of the fourth transistor, can be connected to the current source, wherein the current source may be connected to a ground potential.

In a further implementation form of the amplifier according to the first aspect, the third transistor, for example an input port of the third transistor, can be connected to a ground potential and the fourth transistor, for example an input port of the fourth transistor, can be connected to the ground potential.

In a further implementation form of the amplifier according to the first aspect, the third transistor and the fourth transistor can be of identical configuration.

In a further implementation form of the amplifier according to the first aspect, the first voltage control means can comprise a first attenuator, and the second voltage control means can comprise a second attenuator, and the voltage control unit further can be configured to define a ratio of the first control signal and the second control signal according to a ratio of the first attenuator and the second attenuator.

In a further implementation form of the amplifier according to the first aspect, the voltage control unit further can comprise a first control output port configured to output the first control signal, and a second control output port configured to output the second control signal, and the first transistor, for example a control port of the first transistor, can be connected to the first control output port and the second transistor, for example a control port of the second transistor, can be connected to the second control output port, and the amplifier further can comprise a first input port, connected to the second transistor, for example to an output port of the second transistor, and configured to receive an external supply voltage.

In a further implementation form of the amplifier according to the first aspect, the amplifier further can comprise an output port, configured to output a single-ended output signal, and the output port can be connected to the first transistor, for example to an output port of the first transistor, and to the second transistor for example to an input port of the second transistor. In a further implementation form of the amplifier according to the first aspect, the amplifier can comprise a second input port and a third input port, and the amplifier can further be configured to receive the differential input signal at the second input port and at the third input port, and provide the received differential input signal to the voltage control unit.

A second aspect, the present invention provides a method for operating an amplifier for use in an optical communication device, wherein the amplifier comprises an amplifying stage, an impedance matching stage connected to the amplifying stage, and a voltage controller (also indicated as voltage control unit); and wherein the method comprises the steps of: generating, by the voltage control unit, based on a received differential input signal, a first control signal for controlling the amplifying stage and a second control signal for controlling the impedance matching stage, wherein a ratio between the first control signal and the second control signal has a predefined value.

In an implementation form of the method according to the second aspect, a ratio between an amplitude of the first control signal and an amplitude of the second control signal can relate to a voltage gain of the amplifying stage.

In a further implementation form of the method according to the second aspect, the amplifying stage can comprise a first transistor and the impedance matching stage can comprise a second transistor and the first control signal and the second control signal can be out of phase.

In a further implementation form of the method according to the second aspect, the amplitude of the first control signal can be proportional to the amplitude of the second control signal and the first control signal and the second control signal can be out of phase by 180 degrees.

In a further implementation form of the method according to the second aspect, the voltage control unit can comprise a first voltage control means and a second voltage control means, wherein the first voltage control means can be configured to output the first control signal according to the differential input signal, and wherein the second voltage control means can be configured to output the second control signal according to the differential input signal. In a further implementation form of the method according to the second aspect, the first voltage control means can comprise a first resistor, and the second voltage control means can comprise a second resistor, and the voltage control unit can further be configured to define the ratio of the first control signal and the second control signal according to a ratio of the first resistor and the second resistor.

In a further implementation form of the method according to the second aspect, the first voltage control means can comprise a third transistor, and the second voltage control means can comprise a fourth transistor, and the voltage control unit can further be configured to define the ratio of the first control signal and the second control signal according to a ratio of the third transistor and the fourth transistor.

In a further implementation form of the method according to the second aspect, the ratio of the first resistor and the second resistor can be configured according to a type and/or configuration of the first transistor and the second transistor, and/or the ratio of the third transistor and the fourth transistor can be configured according to a type and/or configuration of the first transistor and the second transistor.

In a further implementation form of the method according to the second aspect, the voltage control unit can comprise a current source, and the third transistor, for example an input port of the third transistor, can be connected to the current source and the fourth transistor, for example an input port of the fourth transistor, can be connected to the current source, wherein the current source can for example be connected to a ground potential.

In a further implementation form of the method according to the second aspect, the third transistor, for example an input port of the third transistor, can be connected to a ground potential and the fourth transistor, for example an input port of the fourth transistor, can be connected to the ground potential.

In a further implementation form of the method according to the second aspect, the third transistor and the fourth transistor can be of identical configuration.

In a further implementation form of the method according to the second aspect, the first voltage control means can comprise a first attenuator, and the second voltage control means can comprise a second attenuator, and the voltage control unit further can be configured to define a ratio of the first control signal and the second control signal according to a ratio of the first attenuator and the second attenuator.

In a further implementation form of the method according to the second aspect, the voltage control unit further can comprise a first control output port configured to output the first control signal, and a second control output port configured to output the second control signal, and the first transistor, for example a control port of the first transistor, can be connected to the first control output port and the second transistor, for example a control port of the second transistor, can be connected to the second control output port, and the amplifier further can comprise a first input port, connected to the second transistor, for example to an output port of the second transistor, and configured to receive an external supply voltage.

In a further implementation form of the method according to the second aspect, the amplifier further can comprise an output port, configured to output a single-ended output signal, and the output port can be connected to the first transistor, for example to an output port of the first transistor, and to the second transistor, for example to an input port of the second transistor.

In a further implementation form of the method according to the second aspect, the amplifier can comprise a second input port and a third input port, and the amplifier can further be configured to receive the differential input signal at the second input port and at the third input port, and provide the received differential input signal to the voltage control unit.

The method according to the second aspect and its implementation forms achieve the same advantages as the amplifier according to the first aspect and its respective implementation forms.

A third aspect of the present invention provides an optical communication device, comprising the amplifier according to the first aspect or any one of its implementation forms, and an electro- optical modulator.

The optical communication device according to the third aspect achieves the same advantages as the amplifier according to the first aspect and its respective implementation forms. It has to be noted that all devices, elements, units and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

BRIEF DESCRIPTION OF DRAWINGS

The above described aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which

Fig. 1 shows an amplifier according to an embodiment of the present invention,

Fig. 2 shows a schematic model of a transistor,

Fig. 3 shows an amplifier according to an embodiment of the present invention in more detail,

Fig. 4 shows another amplifier according to an embodiment of the present invention,

Fig. 5 shows another amplifier according to an embodiment of the present invention,

Fig. 6 shows a schematic overview of a method according to an embodiment of the present invention,

Fig. 7 shows an optical communication device according to an embodiment of the present invention, and Fig. 8 shows a schematic view of a conventional optical transmitter.

DETAILED DESCRIPTION OF EMBODIMENTS

Fig. 1 shows an amplifier 100 according to an embodiment of the present invention. The amplifier 100 is in particular suitable for an optical communication device, i.e. the amplifier 100 is suitable for handling frequencies that are used for optical communication. The amplifier 100 is in particular illustrated by the rectangle that is shown in Fig. 1, which contains further circuitry. The rectangle in particular illustrates that the amplifier 100 may be in principle a conventional amplifier that includes non-conventional circuitry, wherein the advantageous effect of the present invention is based on the non-conventional circuitry.

The amplifier 100 comprises an amplifying stage 101, an impedance matching stage 102, and voltage controller (also indicated as voltage control unit in the following) 103. As it is illustrated in Fig. 1 the impedance matching stage 102 and the amplifying stage 101 are connected with each other. The amplifying stage 101 can be implemented by means of a transistor, while the impedance matching stage 102 can be implemented by means of a transistor, a resistor or a combination of a transistor and a resistor.

The core of the present invention is to modify a received differential input signal 104 (which is received by the amplifier 100 and in turn provided to the voltage control unit 103 in the amplifier 100) to generate a first control signal 105 and a second control signal 106, which are in a predefined relationship. The first control signal 105 and the second control signal 106 are generated by the voltage control unit 103, which is capable of adjusting an amplitude and a phase of the generated signals, each. The first control signal 105 feeds the amplifying stage 101, and the second control signal 106 feeds the impedance matching stage 102. The function of the amplifying stage 101 is to amplify a signal which will be provided by a single output port of the amplifier 100 (i.e. the signal Vout as illustrated in Fig. 1), while the function of the impedance matching stage 102 is to absorb interfering external signals. The specific relation of the second control signal 106 of the impedance matching stage 102 to the first control signal 105 of the amplifying stage 101 allows to drive the impedance matching stage 102 in such a way that, during transmission, the impedance matching stage 102 does not attenuate the signal generated by the amplifying stage 101. Further, a ratio between an amplitude of the first control signal 105 and an amplitude of the second control signal 106 relates to a voltage gain of the amplifying stage 101. As a result, a differential- input, DC coupled, single-ended output amplifier with matched output termination is provided by the amplifier 100.

In other words, according to an embodiment of the present invention the control voltage (i.e. the second control signal 106) of the impedance matching stage 102 is chosen in a defined relationship according to the control voltage (i.e. the first control signal 105) of the amplifying stage 101, so that the impedance matching stage 102 does not attenuate the output signal Vout during transmission.

In case that the amplifying stage 101 and/or the impedance matching stage 102 comprises a transistor, they can be implemented by using any kind of transistor known in the prior art. Also, all further transistors which are going to be described in this document can be implemented by using any kind of transistor known in the prior art. More specifically, bipolar junction transistors (BJTs) or field effect transistors (FETs) can be used in the amplifier 100. All transistors used in the amplifier 100 do not necessarily have to be of a same kind. However, an arbitrary combination of different types of transistors can be used.

In case that a BJT is used, a base port of the BJT can be regarded as a control port, an emitter port of the BJT can be regarded as an input port and a collector port of the BJT can be regarded as an output port.

In case that a FET is used, a gate port of the FET can be regarded as a control port, a drain port of the FET can be regarded as an output port and a source port of the FET can be regarded as an input port.

The amplifier 100 can also be implemented using transistor types such as a heterojunction bipolar transistor (HBT), a Darlington transistor, a Schottky transistor, a multiple-emitter transistor, a dual gate MOSFET, a junction FET transistor, an avalanche transistor or a diffusion transistor.

In a preferred implementation manner, the amplifying stage 101 as well as the impedance matching stage 102 are implemented by means of a transistor, each. In this case, the first control signal 105 and the second control signal 106 may be out of phase, i.e. phase shifted towards each other.

The transistor of the amplifying stage 101 and the transistor of the matching stage 102 can both be either of an FET type or both by of a BJT type. The transistors may have a same channel definition, i.e. both transistors are n-channel transistors if an FET type is used, or npn transistors if a BJT type is used. A solution based on p-channel for FET or pnp for BJT is technically feasible, but of low practical interest because of a low cut-off frequency of p-channel FETs and pnp BJTs. Further example implementations of the amplifier 100 throughout this document are based on n-channel FETs transistors. However, those example implementations can also be based on npn BJT transistors, or any combination thereof.

Further optionally, the voltage control unit 103 can be regarded as a component with four terminals, i.e. two input ports and two output ports, whose constitutive behavior can be described with the following equations (Equation 1):

^V OUTl ^{= A V} INl

VOUT2 ^{= B V} IN2 where VINI and VIN2 are the voltages at the input ports (Vin+ and Vin- in Fig. 1), while VOUTI and VOUT2 are the voltages at the output ports (i.e. the first control signal 105 and the second control signal 106 in Fig. 1). Moreover, the parameters‘A’ and Έ’ are real-valued and can be defined independently.

The differential input signal 104 of the amplifier 100 is represented by Vin+ and Vin- (see Fig. 1). The single-ended output of the amplifier is represented by Vout (see Fig. 1).

In order to use the amplifier 100 in an optical communication device, the output signal can be DC coupled with an electro-optical modulator, such as an EMF.

Fig. 1 only shows those components of an amplifier 100, related to the core effect upon which embodiments of the present invention are based. Any further components of the amplifier 100, in particular those that are going to be described below, in particular in view of Figs. 3, 4 and 5, can be regarded as optional features. Any variants of amplifiers known in the prior-art are suitable to be used together with the present invention, in particular as described in view of Fig. 1.

Fig. 2 shows a schematic model of a transistor that can be used in the amplifier 100. Although the functionality of the amplifier 100 can be implemented by means of any kind of transistor, it is now demonstrated by using a well-known simplified model in which the transistors are assumed to be FETs.

In section A of Fig. 2 a correlation between the above described output, control and input ports of a general transistor and the drain, gate and source port of a FET is illustrated.

Section B of Fig. 2 shows an equivalent circuit of an FET composed by a voltage controlled current source (Ids gm Vgs).

In view of the equivalent circuit of the FET, a voltage gain (Av) and an output impedance (ZOUT) of amplifier 100 of Fig. 1 can be calculated as shown in Equations 2 and 3 in the following:

Equation 2:

¾n2

1 + K- 8m 1

^A V ¾nl ^{' R} L ^'

^{1 +} 8m2 ^'R L

Equation 3 :

1

^Z OUT ^“

¾n2 wherein g _mi and g _m 2 are the transconductances of the FETs used to implement the amplifying stage 101 and the impedance matching stage 102, as illustrated in Fig. 1. Moreover, RL represents an equivalent resistance of an electro-optical modulator D (which can be an EML, and can be connected to the output port of the amplifier 100 and is also shown in Figs. 3, 4 and 5) and‘K = -V _g2 / V _gi ’ is a ratio of the voltage amplitudes V _g2 and V _gi at the gate terminals of the transistors that are used to implement the amplifying stage 101 and the impedance matching stage 102. That is, V _g2 is the second control signal 106 and V _gi is the first control signal 105. More specifically, in case that the amplifying stage 101 is implemented by means of a transistor, the first control signal 105 is provided to a control port of this transistor and an output port to output the output signal Vout is connected to an output port of this transistor. In case that the impedance matching stage 102 is implemented by means of a transistor, the second control signal 106 is provided to a control port of this transistor and the output port to output the output signal Vout is connected to an input port of this transistor.

This general concept applies to the amplifying stage 101 and the impedance matching stage 102 as described in view of Fig.1, but also to a first transistor 301 and a second transistor 302, which are going to be described in view of Figs. 3, 4 and 5 below.

In order to achieve a matched output impedance by the amplifier 100, it is required that‘Z _O U _T = R _L ’. From Equation 3, this can be obtained by properly selecting the transistor used to implement the impedance matching stage 102, which has to comply with‘g _m 2 = 1 / R _L ’. Moreover, in order to avoid power dissipation during transmission of a signal, it is required that the transistor used to implement the impedance matching stage 102 behaves as a constant current source. From Equation 2, this can be achieved by selecting‘K = g _mi · R _L ’. This is obtained by the voltage control unit 103, as‘K = B / A’, wherein A and B are the parameters in Equation 1 (see above).

In other words, a core of the present invention is that the transistors that are used to implement the amplifying stage 101 and the impedance matching stage 102 have input voltages (V _gi and V _g2 ) that have different amplitudes and are out of phase (wherein V _gi is the first control signal 105 and V _g2 is the second control signal 106). With a proper amplitude ratio (K = g _mi · R _L ) it is possible to obtain the matched output impedance without dissipating output power during transmission of a signal.

Fig. 3 shows an amplifier 300 according to an embodiment of the present invention in more detail. The amplifier 300 as described below comprises all features and functionality of the amplifier 100. All additional features and functionality of the amplifier 300 can be considered as optional features. The amplifier 300 specifically can comprise a first transistor 301, a second transistor 302, a first voltage control circuit (in the following also first voltage control means) 303, a second voltage control circuit (in the following also second voltage control means) 304, a first resistor 305, a second resistor 306, a third transistor 307, a fourth transistor 308, a current source 309, a first control output port 310, a second control output port 311, a first input port 312, an output port 313, a second input port 315, a third input port 316.

In Fig. 3, the first transistor 301 implements the amplifying stage 101 and the second transistor 302 implements the impedance matching stage 102. To this end, the first control signal 105 is received by the first transistor 301 and the second control signal 106 is received by the second transistor 302. This is realized by a control port 30lc of the first transistor 301 being connected to the first control output port 310 and by a control port 302c of the second transistors 302 being connected to the second control output port 311. The first transistor 301 and the second transistor 302 specifically can be FETs.

In the embodiment shown in Fig. 3, in a preferred implementation manner, an amplitude (which can be considered as an absolute value) of the second control signal 106 is proportional to an amplitude of the first control signal 105 , wherein those two signals are out of phase, for example by 180 degrees (V _g2 = -gm i Ri * V _gi ). In particular, the second control signal 106 at the control port 302c of the second transistor 302 is phase shifted by 180 degrees with respect to the first control signal 105. Thus, if the second control signal 106 is out of phase with respect to the first control signal 105, the signals at an input port 302i of the second transistor 302 and at an output port 30 to of the first transistor 301 will be in phase again and the matching stage 102 (i.e. the second transistor 302) will not attenuate an output signal 314 in a transmitting phase.

As it is also shown in Fig. 3, an input port 30li of the first transistor 301 is connected to a ground potential. An output port 302o of the second transistor is connected to the first input port 312. The output port 313 is configured to output the single-ended output signal 314. To this end, the output port 313 is further connected to the first transistor 301, for example to an output port 30 to of the first transistor, and to the second transistor 302, for example to an input port 302i of the second transistor 302. By means of the input port 312, and external supply voltage VDD can be provided to the amplifier 300 by means of an external source that is not included in the amplifier 300. By means of the output port 313, the output signal 314 can be provided to an external electro-optical modulator, i.e. a device that can transform electronic information into optical information, e.g. an EML, which is not included in the amplifier 300. The external source and the electro-optical modulator, however, are shown in Fig. 3 for illustrative purposes.

The voltage control unit 103 further optionally can comprise a first voltage control means 303 and a second voltage control means 304, as it is illustrated in Fig. 3.

The first voltage control means 303 is configured to output the first control signal 105 according to the differential input signal 104. The second voltage control means 304 is configured to output the second control signal 106 according to the differential input signal 104. To output the first control signal 105, the first voltage control means 303 is connected to the first control output port 310, and to output the second control signal 106 the second voltage control means 304 is connected to the second control output port 311. To receive the differential input signal 104, the first voltage control means 303 is connected to the second input port 315, and the second voltage control means 304 is connected to the third input port 316. The amplifier 300 can thus be configured to receive the differential input signal 104 at the second input port 315 and at the third input port 316, and provide the received differential input signal 104 to the voltage control unit 103. The differential input signal 104 can comprise two differential components Vin- and Vin+.

Further optionally, the first voltage control means 303 can comprise a first resistor 305, and the second voltage control means 304 can comprise a second resistor 306. The voltage control unit 103 defines the ratio of the first control signal 105 and the second control signal 106 in particular according to a ratio of the first resistor 305 and the second resistor 306, in particular according to a ratio of the resistances of the two resistors. More specifically, the first resistor 305 and the second resistor 306 are both connected to the first input port 312, each.

Further optionally, the first voltage control means 303 can comprise a third transistor 307, and the second voltage control means 304 can comprise a fourth transistor 308. The voltage control unit 103 can additionally define the ratio of the first control signal 105 and the second control signal 106 according to a ratio of the third transistor 307 and the fourth transistor 308, in particular according to a ratio of operating properties of both transistors. More specifically, the first resistor 305 is connected to the third transistor 307, for example to an output port 307o of the third transistor 307. More specifically, the second resistor 306 is connected to the fourth transistor 308, for example to an output port 308o of the fourth transistor 308.

More specifically, the ratio of the first resistor 305 and the second resistor 306 is configured according to a type and/or configuration of the first transistor 301 and the second transistor 302. More specifically, the ratio of the third transistor 307 and the fourth transistor 308 is configured according to a type and/or configuration of the first transistor 301 and the second transistor 302. That is, the first control signal 105 and the second control signal 106 can be precisely adjusted according to the type and/or configuration of the first transistor 301 and or the second transistor 302.

To generate the first control signal 105, based on the received differential input signal 104, the third transistor 307, for example a control port 307c of the third transistor 307 is connected to the second input port 315. The second input port 315 may receive the Vin+ component of the differential input signal 104.

To generate the second control signal 106, based on the received differential input signal 104, the fourth transistor 308, for example a control port 308c of the fourth transistor 308 is connected to the third input port 316. The third input port 316 may receive the Vin- component of the differential input signal 104.

To output the first control signal 105, the first control output port 310 is connected to the third transistor 307, for example to the output port 307o of the third transistor 307, and to the first resistor 305. To output the second control signal 106, the second control output port 311 is connected to the fourth transistor 308, for example to the output port 308o of the fourth transistor 308, and to the second resistor 306.

As it is shown in Fig. 3, the voltage control unit 103 further can comprise an optional current source 309. In this case, the third transistor 307, for example an input port 307i of the third transistor 307, is connected to the current source 309 and the fourth transistor 308, an input port 308i of the fourth transistor 308, is connected to the current source 309, wherein the current source 309 may further be connected to a ground potential. More specifically the third transistor 307 and the fourth transistor 308 can be of identical configuration, i.e. they can be of a same type and/or provide identical operating properties.

In other words, the embodiment which is described in view of Fig. 3 comprises the first transistor 301, the second transistor 302 and the voltage control unit 103, which is implemented by means of a differential amplifier with unequal load resistors (i.e. the first resistor 305 and the second resistor 306). In a specific implementation example, the differential amplifier comprises two equal transistors (i.e. the third transistor 307 and the fourth transistor 308), two resistors (i.e. the first resistor 305 and the second resistor 306) and a constant current source 309. The first resistor can also be called Ri and the second resistor can also be called R ₂ . In this example, the first control signal 105 can also be called V _gi and the second control signal 106 can also be called V _g2 . That is, the ratio of resistors Ri and R ₂ is selected to obtain a proper ratio of V _gi and V _g2 . In particular, R ₂ / Ri = V _g2 / V _gi = g _mi · RL has to be selected in order to achieve the advantageous effect of the present invention. The embodiment described in view of Fig. 3 in particular is regarded the easiest way to fully integrate the present invention in MMIC technologies.

Fig. 4 shows another amplifier 400 according to an embodiment of the present invention. The amplifier 400 comprises all features and functionality of the amplifiers 100 and 300 as described above, except for the difference that the amplifier 400 does not include the current source 309. Instead, the third transistor 307, for example an input port 307i of the third transistor 307, is connected to a ground potential, and the fourth transistor 308, for example an input port 308i of the fourth transistor 308, is connected to the ground potential.

In other words, in the embodiment as described in view of Fig. 4, the voltage control unit 103 is implemented by means of an unequal single-ended amplifier. A proper ratio of the voltages V _gi and V _g2 (i.e. the first control signal 105 and the second control signal 106) can be obtained either by selecting a proper ratio of resistors Ri and R ₂ (i.e. the first resistor 305 and the second resistor 306); or by selecting the proper ratio of transistors Q ₃ and Q ₄ (i.e. the third transistor 307 and the fourth transistor 308); or by selecting a combination of resistors (Ri, R ₂ being the first resistor 305 and the second resistor 306) and transistors (Q ₃ , Q ₄ being the third transistor 307 and the fourth transistor 308) that results in the following equation: gm4-R2

gml -R _L

gm3 -Rl wherein gml, gm3 and gm4 are the transconductances of FETs Qi, Q ₃ and Q ₄ of Error! Reference source not found., wherein Qi is the first transistor 301, Q ₃ is the third transistor 307 and Q ₄ is the fourth transistor 308.

Fig. 5 shows another amplifier 500 according to an embodiment of the present invention. The amplifier 500 comprises all features and functionality of the amplifiers 100 and 300 as described above, except for the difference that the amplifier 500 does not include the current source 309, and that the first voltage control means 303 does not include the first resistor 305 and the third transistor 307, and that the second voltage control means 304 does not include the second resistor 306 and the fourth transistor 308. Instead, the first voltage control means 303 comprises a first attenuator 501, and the second voltage control means 304 comprises a second attenuator 502. The voltage control unit 103 defines a ratio of the first control signal 105 and the second control signal 106 according to a ratio of the first attenuator 501 and the second attenuator 502, i.e. according to a ratio of operating properties of both attenuators. The first attenuator 501 is connected to the second input port 315 and to the first control output port 310. The second attenuator 502 is connected to the third input port 316 and to the second control output port 311.

In other words, in the embodiment as described in view of Fig. 5, the voltage control unit 103 is implemented by means of unequal attenuators 501 and 502. The attenuation levels of the first attenuator 501 and the second attenuator 502 are selected to obtain a proper ratio of V _gi and V _g2 (i.e. the first control signal 105 and the second control signal 106). Any method to implement an attenuator is suitable to be used in the present invention. In a specific implementation example, an attenuator can be an electronic device that reduces a power of a signal without appreciably distorting the signals’ waveform.

Fig. 6 shows a schematic overview of a method 600 for an amplifier 100. The method 600 corresponds to the amplifier 100 of Fig. 1, and is accordingly for operating the amplifier 100.

The method 600 comprises a step of generating 601, by a voltage control unit 103 of an amplifier 100, based on a received differential input signal 104, a first control signal 105 for controlling an amplifying stage 101 of the amplifier 100 and a second control signal 106 for controlling an impedance matching stage 102 of the amplifier 100, wherein a ratio between the first control signal 105 and the second control signal 106 has a predefined value. Fig. 7 shows an optical communication device 700 according to an embodiment of the present invention. The optical communication device 700 comprises the amplifier 100, and an electro- optical modulator. The optical communication device 700 can also be implemented using any one of the amplifiers 200, 300 or 400 instead. The electro-optical modulator can be an EML. The present invention has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed invention, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word“comprising” does not exclude other elements or steps and the indefinite article“a” or“an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.