Title:
ANALOG-DIGITAL CONVERSION CIRCUIT AND METHOD FOR DRIVING SAME
Document Type and Number:
WIPO Patent Application WO/2013/136676
Kind Code:
A1
Abstract:
An AD conversion circuit (10) is provided with: a clock generation circuit (150) that generates clock signals (211 and 212) including a first initial period (T2) that is either a high period or a low period and is the first period after reset cancellation, and including a plurality of normal periods (T3) that are positioned after the first initial period (T2) and are high periods or low periods that are shorter than the first initial period (T2); and an incremental AD converter (100) that operates using the clock signals (211 and 212).
Inventors:
TOKUNAGA YUSUKE
Application Number:
PCT/JP2013/000978
Publication Date:
September 19, 2013
Filing Date:
February 21, 2013
Export Citation:
Assignee:
PANASONIC CORP (JP)
International Classes:
H03M3/02
Foreign References:
| JPH10322214A | 1998-12-04 | |||
| JPH0570035U | 1993-09-21 | |||
| JP2000236259A | 2000-08-29 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house Extensive 守 (JP)
New house Extensive 守 (JP)
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