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Title:
APPARATUS AND METHOD FOR IMPROVING COMMUNICATION BETWEEN A PLURALITY OF TRANSMITTERS AND A MULTI-ANTENNA DIGITAL RECEIVER USING LOW-ACCURACY ANALOG-TO-DIGITAL CONVERTERS
Document Type and Number:
WIPO Patent Application WO/2018/014945
Kind Code:
A1
Abstract:
The present invention relates to a multi-antenna digital receiver comprising receiving antenna elements, an ADC unit which receives input signals, and a DSP unit. The ADC unit determines, for each input signal a corresponding discrete-time folded signal by applying a modulo operation to the input signal or to a function thereof, and generates a quantized signal based on the discrete-time folded signal. The DSP unit comprises a joint reconstruction block, which jointly processes the quantized signals or a subset thereof to generate output signals. Each of the output signals is a digital representation of a linear combination of the discretetime folded signals. A digital control block in the DSP unit generates a control signal for controlling the modulo operation and determines the coefficients of the linear combinations to maximize a utility function measuring a QoS of a communication between a transmitter connected to the digital receiver and the digital receiver.

Inventors:
GARCIA ORDONEZ LUIS (DE)
ESTELLA AGUERRI INAKI (DE)
GUILLAUD MAXIME (DE)
Application Number:
PCT/EP2016/067219
Publication Date:
January 25, 2018
Filing Date:
July 19, 2016
Export Citation:
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Assignee:
HUAWEI TECH CO LTD (CN)
GARCIA ORDONEZ LUIS (FR)
ESTELLA AGUERRI INAKI (DE)
GUILLAUD MAXIME (FR)
International Classes:
H04B7/08; H03M1/20
Foreign References:
EP2913890A12015-09-02
Other References:
LIANG NING ET AL: "Mixed-ADC Massive MIMO", IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, IEEE SERVICE CENTER, PISCATAWAY, US, vol. 34, no. 4, 1 April 2016 (2016-04-01), pages 983 - 997, XP011609676, ISSN: 0733-8716, [retrieved on 20160510], DOI: 10.1109/JSAC.2016.2544604
ORDENTLICH OR ET AL: "Integer-Forcing source coding", 2014 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY, IEEE, 29 June 2014 (2014-06-29), pages 181 - 185, XP032635188, DOI: 10.1109/ISIT.2014.6874819
Attorney, Agent or Firm:
KREUZ, Georg (DE)
Download PDF:
Claims:
CLAIMS 1. A multi- antenna digital receiver (100) comprising a plurality of receiving antenna

elements (110), an analog-to-digital converting, ADC, unit (120) configured to receive a plurality of input signals, and a digital signal processing unit, DSP unit (130),

wherein the ADC unit (120) is configured to determine, for each input signal with m indicating an m-th input signal, a corresponding discrete-time folded signal y by applying a modulo operation to the input signal or to a function

thereof, and to generate a quantized signal based on the discrete-time folded signal with ί indicating an -th sample,

wherein the DSP unit (130) comprises:

a joint reconstruction block (132) configured to jointly process the determined quantized signals or a subset thereof, to generate output signals, each

of the output signals being a digital representation of a linear combination of the discrete-time folded signals and

a digital control block (134) configured to generate a control signal for controlling the modulo operation and to determine the coefficients of the linear combinations of the discrete-time folded signals ] so as to maximize a utility

function measuring a quality of service of a communication between a transmitter (140) connected to the multi- antenna digital receiver (100) and the multi-antenna digital receiver (100). 2. The multi- antenna digital receiver (100) according to claim 1 , wherein the modulo

operation is such that the discrete-time folded signal has a dynamic range of

wherein a is a parameter describing the dynamic range.

3. The multi- antenna digital receiver (100) according to claim 1 or 2, wherein the ADC unit (120) is further configured to amplify the input signal with a gain g to generate an amplified signal, and apply the modulo operation to the amplified signal to generate an analog signal the generated analog signal corresponding to the discrete-time folded signal

4. The multi- antenna digital receiver (100) according to claim 2, wherein the ADC unit (120) is further configured to amplify the input signal with a gain g to generate an amplified signal, add a dither signal to the amplified signal and apply the modulo operation to a resulting signal to generate an analog signal

the generated analog signal corresponding to the discrete-time folded signal

5. The multi- antenna digital receiver (100) according to claim 4, wherein the ADC unit (120) is configured to perform a quantization for generating the quantized signal

with a resolution of bits and the dither signal is uniformly distributed in the

range

6. The multi- antenna digital receiver (100) according to claim 5, wherein the joint

reconstruction block (132) is configured to, for each quantized signal

subtract from the quantized signal ] a corresponding discrete-time version

of the dither signal modulo-reduce a resulting signal

with respect to a lattice with a being a lattice spacing, thereby arriving at a signal

after performing steps for each quantized signal , stack

with M being the number of the plurality of input signals

resulting in a vector , combine the vector with a mixing matrix

containing the coefficients of the linear combinations with being equal, larger or smaller than and modulo-reduce the signal after combining with

respect to lattice Λ, to generate an output signal, the output signal being one of the output signals of the joint reconstruction block and being a digital reconstruction 7. The multi-antenna digital receiver (100) according to claim 6, wherein the digital

control block (134) is configured to adapt an amplifier gain matrix

and output the mixing matrix A to the joint reconstruction block (132). 8. The multi- antenna digital receiver (100) according to claim 7, wherein the digital

control block (134) is configured to adapt the amplifier gain matrix

and the mixing matrix A to a spatial covariance matrix of input signals with an entry given by by using an

optimization algorithm for maximizing the utility function measuring the quality of service of the communication between transmitters (140) connected to the multi- antenna digital receiver (100) and the multi-antenna digital receiver (100).

9. The multi-antenna digital receiver (100) according to claim 8, wherein the optimization algorithm comprises the steps of (i) applying a lattice reduction algorithm to a utility matrix F being a function of the spatial covariance matrix , the amplifier gain matrix

G, and a matrix B containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter a, with the amplifier gain matrix G being fixed, thereby obtaining an updated mixing subsequently obtaining an updated

amplifier gain matrix G by maximizing the utility function with the updated mixing matrix A being fixed, and performing steps until a difference between an updated utility function, being the utility function corresponding to the updated amplifier gain matrix G and the updated mixing matrix A, and a previously updated utility function is below a threshold.

10. The multi-antenna digital receiver (100) according to claim 9, wherein the amplifier gain matrix G is defined as with g being a gain factor.

11. The multi- antenna digital receiver (100) according to claim 7, wherein the digital

control block (134) is configured to select the amplifier gain matrix based on a matrix B containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter s, and a spatial covariance matrix of the input signals

with an entry given by / and apply a lattice reduction

algorithm to a utility matrix F being a function of the spatial covariance matrix

, the amplifier gain matrix G, and the matrix B, thereby obtaining the mixing matrix A.

12. A method performed by a multi-antenna digital receiver (100), in particular the multi- antenna digital receiver according to any of claims 1 to 10, the method comprising the steps of:

• determining, by the ADC unit (120), for each input signal with

indicating an m-th input signal, a corresponding discrete-time folded signal

by applying a modulo operation to the input signal or to a function thereof, and generating, by the ADC unit (120), a quantized signal based on the

discrete-time folded signal y with i indicating an -ί-th sample;

• jointly processing, by a joint reconstruction block (132), the determined quantized signals or a subset thereof, to generate output signals, each of the output signals being a digital representation of a linear combination of the discrete-time folded signals

· generating, by a digital control block (134), a control signal for controlling the modulo operation and to determine the coefficients of the linear combinations of the discrete-time folded signals so as to maximize a utility function

measuring a quality of service of a communication between a transmitter (140) connected to the multi- antenna digital receiver (100) and the multi-antenna digital receiver (100). 13. The multi-antenna digital receiver (100) according to claim 12, wherein the ADC unit (120) is further configured to amplify the input signal with a gain gm to generate

an amplified signal, and apply the modulo operation to the amplified signal to generate an analog signal the generated analog signal corresponding to the discrete-time folded signal

14. The method according to claim 12, further comprising amplifying the input signal with a gain and

subsequently adding a dither signal and applying the modulo operation to a

resulting signal to generate an analog signal y being the analog signal corresponding to the discrete-time folded signal

15. A computer program comprising program code for performing the method of claim any one of claims 12 to 14.

Description:
APPARATUS AND METHOD FOR IMPROVING COMMUNICATION BETWEEN A PLURALITY OF TRANSMITTERS AND A MULTI-ANTENNA DIGITAL RECEIVER USING LOW-ACCURACY ANALOG-TO-DIGITAL CONVERTERS

FIELD OF THE INVENTION The present invention is directed to a multi-antenna digital receiver and a method performed by the multi-antenna digital receiver.

BACKGROUND OF THE INVENTION

Establishing a communication link between a plurality of transmitters and a multi-antenna receiver using digital signal processing techniques requires an interface between the analog received signals and the digital signal processor. As shown in Fig. 1, the analog signals received at the multiple antennas are sampled and quantized using an analog-to-digital conversion (ADC) unit. If the received signals are sampled at the Nyquist rate or above and quantized with high precision, then the effects of the ADC unit are negligible. However, high- precision analog-to-digital conversion may not be feasible in terms of cost- and power- efficiency in communication systems using very high carrier frequencies and a large bandwidth and/or a large number of receive antennas, see for example, J. Liu and H. Minn, "The death of 5G part 2: Will analog be the death of massive MIMO?," ComSoc Technology News Editorial, Jun. 2015, [Online] http ://www . comsoc . or g/ctn .

Since the power consumption of analog-to -digital conversion scales roughly exponentially with number of quantization bits, see for example B. Murmann, "ADC Performance Survey 1997-2014" [Online], http ://web . stanford.edu/~murmann/adcsurvey.html, the most straightforward solution follows simply from adopting the conventional multi-antenna digital architecture in Fig. 2 and substituting high-precision quantizers (e.g. 10-15 bits) with low- resolution quantizers (e.g. 3-5), or, even 1-bit quantizers. This direction has been extensively explored in the literature for MIMO and Massive MIMO systems.

However, a conventional receiver architecture using low-accuracy quantization suffers from a huge performance degradation in a realistic scenarios. Particularly important is the impact of large-scale fading and imperfect power control, which results in received power imbalances among the different users, see for example S. Jacobsson, G. Durisi, M. Coldrey, U. Gustavsson, C. Studer, "Massive MIMO with Low-Resolution ADCs", Feb. 2016, [Online] http://arxiv.org/abs/1602.01139.

The present invention circumvents these limitations by exploiting the correlation among the analog received signals when converting them to digital signals that can be processed at the DSP unit. As shown in Fig. 2 referring to a conventional multi-antenna digital receiver each antenna/RF output is independently quantized based on its marginal statistics using, e.g., a uniform symmetric quantizer with some given bit-resolution and uniform quantization thresholds adapted to the statistics of the analog input. Then, each antenna/RF output is digitally reconstructed uniquely based on the output bits of the corresponding quantizer. As this specific architecture processes independently all antenna outputs, it fails to exploit any correlation that may exist among them. Furthermore, slight modifications of this architecture, such as adding a dithering signal before quantization, still fail to exploit correlations among the channel outputs.

Therefore, a problem of the present invention is to provide a multi-antenna digital receiver and a corresponding method performed by the multi-antenna digital receiver for exploiting the existing correlation among the received signals in the ADC process and, thus, increasing the communication rates between transmitters connected to the multi- antenna digital receiver and the multi-antenna digital receiver. The problem is solved by the subject matter of independent claims 1 and 12. Advantageous implementations of the present invention are further defined in the respective dependent claims.

SUMMARY OF THE INVENTION

In a first aspect a multi-antenna digital receiver is provided, the receiver comprising a plurality of receiving antenna elements, an analog- to -digital converting, ADC, unit configured to receive a plurality of input signals, and a digital signal processing unit, DSP unit,

wherein the ADC unit is configured to determine, for each input signal with indicating an m-th input signal, a corresponding discrete-time folded signal y

applying a modulo operation to the input signal or to a function thereof, and to generate a quantized signal based on the discrete-time folded signal with £ indicating an

sample,

wherein the DSP unit comprises:

a joint reconstruction block configured to jointly process the determined quantized signals or a subset thereof, to generate output signals, each of the output signals being a digital representation of a linear combination of the discrete-time folded signal and

a digital control block configured to generate a control signal for controlling the modulo operation and to determine the coefficients of the linear combinations of the discrete-time folded signals so as to maximize a

utility function measuring a quality of service of a communication between a transmitter connected to the multi-antenna digital receiver and the multi- antenna digital receiver.

Thereby, the communication rates or a function thereof between the multi-antenna digital receiver using low-accuracy analog-to-digital conversion (ADC) and a plurality of transmitters can be significantly increased. The multi-antenna digital receiver comprises a plurality of receiving antennas and RF chains, and an ADC unit configured to transform the analog signals received at the antenna array into a plurality of digital signals that are further processed by the DSP unit. The present invention provides a novel multi-antenna digital receiver architecture, which is able to exploit the correlation among the analog signals to be converted by including: (i) additional analog processing blocks at the ADC unit, (ii) additional digital signal processing functions to jointly obtain a digital reconstruction of the received signals at the DSP unit, and (iii) a digital control block to adapt the behavior of the previous blocks to the correlation of the received signals. This way, the supported communication rate between the users and the multi-antenna digital receiver is improved with respect to conventional receivers using the same quantization resolution. Indeed, the combination of (i) and (ii), when the corresponding parameters are properly selected by (iii), happens to minimize the effects of the quantization noise in the digital reconstructed signals as opposed to conventional receivers, which are ultimately limited by the ADC unit resolution. Alternatively, the present invention allows to lower the quantization resolution while guaranteeing the individual communication rates supported with a conventional multi-antenna receiver.

The proposed multi-antenna digital receiver architecture or, more exactly, (i) the specific analog pre-processing at the ADC unit and (ii) the joint digital reconstruction at the DSP unit are inspired by the results of O. Ordentlich and U. Erez, "Integer- forcing source coding," Aug. 2013, [Online] http://arxiv.org/abs/1308.6552, where the authors present a source- coding scheme for distributed lossy compression of correlated sources with symmetric rate and distortion in the reconstruction of each source. The invention disclosed here is substantially different from this prior art document in the sense that the present invention does not aim at reconstructing the antenna/RF outputs with some distortion requirements, but in adapting the ADC parameters, so that the transmission rate between the users and the receiver or any function thereof is maximized. This requires an additional digital signal processing block (termed as "digital control block" in Fig. 3) which adapts the behavior of the previous blocks to the specific spatial correlation of the received signals and/or other aspects affecting the receiver performance.

According to a first implementation form of the first aspect, the modulo operation is such that the discrete-time folded signal has a dynamic range o wherein a is a

parameter describing the dynamic range.

A purpose of the analog processing block is to limit the dynamic range of each input to a corresponding quantizer to match exactly the input range of the corresponding quantizer, which is done in an effective an easy way according to the first implementation form. According to a second implementation form of the first aspect, the ADC unit is further configured to amplify the input signal with a gain g m , subsequently add a dither signal and apply the modulo operation to a resulting signal to generate an

analog signal analog signal), the generated analog signal corresponding to the discrete-time folded signal

According to an alternative implementation form of the first aspect, the ADC unit is further configured to amplify the input signal with a gain and apply the modulo operation

to a resulting signal, or amplified input signal, to generate an analog signal (or folded

analog signal), the generated analog signal corresponding to the discrete-time folded signal

According to a third implementation form of the first aspect, the ADC unit is configured to perform a quantization for generating the quantized signal with a resolution of bits and the dither signal is uniformly distributed in the range

According to a fourth implementation form of the first aspect, the joint reconstruction block is configured to, for each quantized signal

(i) subtract from the quantized signal a corresponding discrete-time version of the

dither signal

( ii) modulo -reduce a resulting signal with respect to a lattice

with or being a lattice spacing, thereby arriving at a signal

after performing steps (i) - (ii) for each quantized signal

with M being the number of the plurality of input signals resulting in a vector

combine the vector with a mixing matrix containing the coefficients

of the linear combinations, with M' being equal, larger or smaller than M, and modulo-reduce the signal after combining with respect to lattice A, thereby arriving at an output signal being one of the output signals of the joint reconstruction block and being a digital reconstruction

According to a fifth implementation form of the first aspect, the digital control block is configured to adapt an amplifier gain matrix and output the mixing

matrix A to the joint reconstruction block.

According to a sixth implementation form of the first aspect, the digital control block is configured to adapt the amplifier gain matrix and the mixing matrix A to a spatial covariance matrix of input signals with an th entry given by

by using an optimization algorithm for maximizing the utility function

measuring the quality of service of the communication between transmitters connected to the multi-antenna digital receiver and the multi-antenna digital receiver. According to a seventh implementation form of the first aspect, the optimization algorithm comprises the steps of (i) applying a lattice reduction algorithm to a utility matrix F being a function of the spatial covariance matrix∑ w , the amplifier gain matrix G, and a matrix B containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter a , with the amplifier gain matrix G being fixed, thereby obtaining an updated mixing matrix A, ( ii) subsequently obtaining an updated amplifier gain matrix G by maximizing the utility function with the updated mixing matrix A being fixed, and performing steps (i) - (ii) until a difference between an updated utility function, being the utility function corresponding to the updated amplifier gain matrix G and the updated mixing matrix A , and a previously updated utility function is below a threshold. According to an eighth implementation form of the first aspect, the amplifier gain matrix G is defined as with g being a gain factor.

According to a ninth implementation form of the first aspect, the digital control block is configured to select the amplifier gain matrix G based on a matrix B containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter a, and a spatial covariance matrix of the input signals with an -th entry given by

and apply a lattice reduction algorithm to a utility matrix F being a function of

the spatial covariance matrix the amplifier gain matrix G, and the matrix B, thereby

obtaining the mixing matrix A.

A second aspect refers to a system comprising at least one the above mentioned multi-antenna digital receivers according to the first aspect or an implementation form of the first aspect.

A third aspect refers to a method performed by a multi-antenna digital receiver, in particular the multi-antenna digital receiver as mentioned above, the method comprising the steps of:

• determining, by the ADC unit, for each input signal with m indicating an m -th input signal, a corresponding discrete-time folded signal y by applying a modulo operation to the input signal or to a function thereof, and generating, by the ADC unit, a quantized signal based on the

discrete-time folded signal with

-f indicating an -f -th sample;

• jointly processing, by a joint reconstruction block, the determined quantized signals or a subset thereof, to generate output signals, each of the output

signals being a digital representation of a linear combination of the discrete- time folded signals \ and

• generating, by a digital control block, a control signal for controlling the

modulo operation and to determine the coefficients of the linear combinations of the discrete-time folded signals so as to maximize a utility function measuring a quality of service of a communication between a transmitter connected to the multi-antenna digital receiver and the multi-antenna digital receiver.

According to a first implementation form of the third aspect, the modulo operation is such that the discrete-time folded signal has a dynamic range of , wherein a is a

parameter describing the dynamic range.

According to a second implementation form of the third aspect, the method further comprises amplifying the input signal ) with a gain g , subsequently adding a dither signal

and applying the modulo operation to a resulting signal g to generate an analog signal (or folded analog signal), the generated analog signal corresponding to the discrete-time folded signal

According to an alternative implementation form of the third aspect, the method further comprises amplifying the input signal with a gain g m , and applying the modulo

operation to a resulting signal, or amplified input signal, to generate an analog signal

(or folded analog signal), the generated analog signal corresponding to the discrete-time folded signal

According to a third implementation form of the third aspect, the method further comprises performing a quantization for generating the quantized signal with a resolution of bits, wherein the dither signal is uniformly distributed in the range

According to a fourth implementation form of the third aspect, the method further comprises, for each quantized signal

( i) subtracting from the quantized signal a corresponding discrete-time version of

the dither signal

( ii) modulo-reducing a resulting signal with respect to a lattice

with a being a lattice spacing, thereby arriving at a signal

after performing steps (i) - (ii) for each quantized signal stack

with M being the number of the plurality of input signals , resulting in a vector combine the vector q [€] with a mixing matrix containing the coefficients

of the linear combinations, with M' being equal, larger or smaller than M, and modulo- reducing the signal after combining with respect to lattice Λ, to generate an output signal being one of the output signals of the joint reconstruction block and being a digital reconstruction

According to a fifth implementation form of the third aspect, the method further comprises adapting by a digital control block an amplifier gain matrix and outputting the mixing matrix to the joint reconstruction block.

According to a sixth implementation form of the third aspect, the method further comprises adapting by the digital control block the amplifier gain matrix and the mixing matrix A to a spatial covariance matrix of input signals with an

entry given by by using an optimization algorithm for maximizing the utility

function measuring the quality of service of the communication between transmitters connected to the multi-antenna digital receiver and the multi-antenna digital receiver. According to a seventh implementation form of the third aspect, the optimization algorithm comprises the steps of (i) applying a lattice reduction algorithm to a utility matrix F being a function of the spatial covariance matrix the amplifier gain matrix G, and a matrix B

containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter a , with the amplifier gain matrix G being fixed, thereby obtaining an updated mixing matrix A, ( ii) subsequently obtaining an updated amplifier gain matrix G by maximizing the utility function with the updated mixing matrix A being fixed, and performing steps (i) - (ii) until a difference between an updated utility function, being the utility function corresponding to the updated amplifier gain matrix G and the updated mixing matrix A , and a previously updated utility function is below a threshold According to an eighth implementation form of the third aspect, the amplifier gain matrix G is defined as with g being a gain factor.

According to a ninth implementation form of the third aspect, the method further comprises selecting by the digital control block the amplifier gain matrix G based on a matrix B containing information about bit resolutions for quantization in the ADC unit and the dynamic range parameter a, and a spatial covariance matrix of the input signals with an

entry given by and applying a lattice reduction algorithm to a utility

matrix F being a function of the spatial covariance matrix the amplifier gain matrix G,

and the matrix B, thereby obtaining the mixing matrix A.

All above mentioned implementation forms of the first aspect contribute for arriving at the advantages already mentioned above with respect to the first aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

The above-described aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to enclosed drawings, in which: Fig. 1 shows a communication system comprising a plurality of transmitters and a multi- antenna digital receiver according to the prior art;

Fig. 2 shows to a multi-antenna digital receiver according to the prior art;

Fig. 3 shows a multi-antenna digital receiver according to the present invention;

Fig. 4 shows an input-output relation for the modulo operation used for folding the input signal

Fig. 5 shows the internal structure of the analog processing block according to one embodiment of the present invention;

Fig. 6 shows the internal structure of the joint reconstruction block;

Fig. 7a shows a flow diagram of an iterative algorithm for selecting the matrices

G and A;

Fig. 7b shows another flow diagram of an iterative algorithm for selecting G and A when the amplifier gains are restricted to the form of

Fig. 8 shows a low-complexity implementation of the algorithms of Figs. 7a/b with only one iteration; Fig. 9a shows the average sum-rate as a function of the received (equal for all

users) for M = 40, K = 2 and b = 4 bits;

Fig. 9b shows the average sum-rate as a function of the received (equal for all

users) for M = 40, K = 2 and 6 = S bits;

Fig. 10a shows the average sum-rate as a function of the received (equal for all

users) for M = 40 ,K = 4, and 6 = 4 bits; Fig. 10b shows the average sum-rate as a function of the received (equal for all users) for

Fig. 11a shows the average sum-rate as a function of the number of receive antennas M at a received (equal for all users) for K = 2, and b = 4 bits;

Fig. 1 lb shows the average sum-rate as a function of the number of receive antennas M at a received (equal for all users) for K = 2, and b = 5 bits;

Fig. 12a shows the average sum-rate as a function of the number of receive antennas M at a received (equal for all users) for K = 4, and b = 4 bits;

Fig. 12b shows the average sum-rate as a function of the number of receive antennas M at a received (equal for all users) for K = 4, and b = 5 bits;

Fig. 13a shows the average sum-rate as a function of the power imbalance ASNR for M = 40, when users 1 and 2 are received with SNR = 20 dB and users 3 and 4 are received with

Fig. 13b shows the average sum-rate as a function of the power imbalance ASNR for Af = 40, K = 4, and b = S bits, when users 1 and 2 are received with SNR = 20 dB and users 3 and 4 are received with

Generally, it has to be noted that all arrangements, devices, elements, units and means and so forth, described in the present application, could be implemented by software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionality described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if in the following description of specific embodiments a specific functionality or step to be performed by a general entity is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these elements and functionalities can be implemented in respective hardware or software elements or any kind of combination thereof. Further, the method of the present invention and its various steps are embodied in the functionalities of the various described apparatus elements.

DETAILED DESCRIPTION OF THE EMBODIMENTS A single-cell uplink wireless system is considered, in which a base station with M antennas (110) serves K single- antenna transmitters or users (140), such as a transmitting device or a user equipment, as shown in Fig. 1 is provided. The processing carried out by the multi- antenna digital receiver (100) at the base station can be summarized as follows. First, the signals received at the M antennas (110) are processed by an ADC unit (120), which provides M digital signals. These digital signals are used to digitally reconstruct the M channel outputs and then fed into the decoder, which recovers the If transmitted messages.

Each of these blocks is now described in more details. For the sake of clarity of presentation, it is focused on real base-band signals, corresponding to the in-phase and quadrature components of the quantizer inputs. It is referred indistinctly to the quantizer inputs as received signals or channel outputs, although in practice they correspond to the received signals after some analog processing in the RF chains, e.g. amplification, down-conversion. Furthermore, a discrete-time representation is adopted, assuming that the signals have been sampled above the Nyquist rate. In order to illustrate this fact, Fig. 2 and Fig. 3 include a sampling block before each one of the quantizer inputs at the ADC unit (120), although, in practice, sampling and quantization are performed by the same physical device.

Table 1. Summary of important notation and symbols.

In a possible scenario a fe-th user, in particular a transmitting device or a user equipment, transmits a rate R k message to the multi-antenna digital receiver and uses an encoder to map the message into a length n channel input sequence We restrict each codeword to satisfy the

average power constraint

The disclosed receiver architecture applies regardless of the propagation channel experienced by the transmitted signal. However, for simplicity, a flat-fading channel model is assumed. Let denote the channel coefficient between the m-th receive antenna (110) and the fe-th user, then the channel output at the m-th BS antenna (110) can be expressed as

where is the -th sample of the length n i.i.d. (independent identically distributed) zero- mean additive noise sequence experienced at the m-th antenna (110) with

defined.

The channel outputs described by (3) are processed by an ADC unit (120), in a sample-

by-sample basis, so that a digital reconstruction can be obtained at the DSP unit (130). In the following, we provide a method that can be implemented in an ADC unit (120) combined with the proposed joint reconstruction at the DSP unit (130) according to the present invention (see Fig. 3).

In an embodiment of the disclosed multi-antenna digital receiver, the ADC unit (120) may be equipped with M analog processing blocks (122) and M quantizers (124) connected to each one of the M antennas (110)/ RF chains (see Fig. 3). Then, the analog channel output vector of is converted to obtain the digital reconstruction as follows.

First, each analog channel output is independently processed by an analog processing block (122) to obtain and sampled to generate the discrete-time signal . In an embodiment, the m-th quantizer may have a resolution of b m bits and map sample-by-sample discrete-time signal to a quantization index, corresponding to the codeword in the quantization codebook This process can be abstracted

by introducing the quantization mapping so that

Finally, the reconstruction of the channel output vector of , denoted by f corresponds to a digital representation of a linearly transformed version of y[ ] and follows from jointly processing at the DSP unit (130) all AT quantization indices ι with the joint reconstruction mapping

with M' being equal, smaller or larger than M. This way, as opposed to the conventional multi- antenna digital receiver, we can exploit the correlation in the analog channel output vector of y(t) with the final objective of improving the communication rate between the K transmitters (140) and the multi-antenna digital receiver (100).

The DSP unit (130) may use the reconstructed signal sequence to

recover the K transmitted messages with a decoding function that maps the reconstructed signal sequence to the estimated messages

In order to keep the complexity of the DSP unit (130) affordable, the decoder is often designed to be as simple as possible, provided that an acceptable decoding performance is guaranteed. For instance, the codewords transmitted by the K users are estimated

sample-by-sample by linear filtering the digital reconstruction. Then, the corresponding messages are independently recovered using a NN-decoding rule, i.e., the fc-th transmitted message is recovered as the message that minimizes some distance metric ( ) between the estimated transmitted codeword and all possible transmitted

messages

The present invention provides an apparatus and a method for, given some bit-resolutions in the ADC unit (120), maximizing some utility function of the individual

communication rates between the K transmitters (140) and a multi-antenna digital receiver

(100), provided that some acceptable quality-of-service in communication links is guaranteed, gives a measure of the target performance, for

Alternatively, the present invention provides an apparatus and a method for, given some target utility function of the individual communication rates between K transmitters

(140) and a multi-antenna digital receiver (100), lower the bit-resolution in the ADC-unit (120), provided that some acceptable quality of service in communication links is guaranteed. The proposed multi-antenna digital receiver (100) comprises a plurality of receive antennas

(110) , an ADC unit (120) configured to transform the analog signals received at the antenna array into a plurality of digital signals, and a digital signal processing (DSP) unit (130), which decodes the messages transmitted by the plurality of users based on the digital reconstruction of the received signals obtained by jointly processing the ADC unit (120) outputs, and additionally controls the ADC unit (120) and the joint reconstruction unit (132).

In comparison with a conventional multi-antenna digital receiver (see Fig. 2) the disclosed multi-antenna digital receiver architecture according to the present invention (see Fig. 3) includes:

(i) an additional analog processing block (122) before each of the M quantizers (124) in the ADC unit (120);

(ii) a digital joint reconstruction block (132) which substitutes the M individual reconstructions in the DSP unit (130);

(111) and, an additional digital control block (134) at the DSP unit (130), which controls the behavior of the previous blocks. The previous functional blocks do not have to be collocated in space or part of a unique physical device, but can be also implemented in different physical devices jointly acting as a unique multi-antenna digital receiver. This happens, for instance, in distributed MIMO systems or cloud-RAN systems. Descriptions and possible embodiments of the previous blocks are provided next. The analog processing block (122) applied to each one of the M inputs of the ADC unit (120), may be configured to limit the dynamic range of each quantizer input to match exactly the corresponding quantizer input range by folding the input signal or a

function thereof, using, at least, an analog modulo block with the input-output relation specified in Fig. 4 or any approximation of it. The behavior of this block is adapted by the digital control block (134). According to the embodiment illustrated in Fig. 5, the analog processing block (122) amplifies the input signal with gain g, m , adds a random dither signal uniformly distributed in the range and applies the analog modulo operation to

so that the resulting analog signal is given by:

where mod(-) stands for the analog modulo operation specified in Fig. 4. The amplifier gain g, m is adapted based on some information provided by the digital control block (134) in Fig. 3.

It is now assumed that the M quantizers (124) following the M analog blocks (122) are symmetric uniform quantizers of bits and input range

uniform quantization thresholds:

The effects of combining the analog processing blocks (122) with symmetric uniform quantizers (124) in the ADC unit (120) can be better understood by resorting to one- dimensional lattices, see for example R. Zamir. "Lattice Coding for Signals and Networks." United Kingdom: Cambridge. University Press, 2014. Consider M pairs of nested one- dimensional lattices A E A^, with:

forming the M quantization codebooks as where

denotes the Voronoi region of Λ. Then, given that the quantizer input y m [f] corresponds to the discrete-time version of (7), i.e.,

the quantization codeword corresponding to the m-th quantizer output

can be expressed as:

where the second equality follows from the commutative property of the lattice quantization with respect to A m and the modulo reduction with respect to A operations for the one- dimensional lattices A and in (9). Equations (10) and (11) use the standard notation in the lattice coding literature (see e.g. R. Zamir. "Lattice Coding for Signals and Networks." United Kingdom: Cambridge. University Press, 2014). Further it has to be mentioned that the number of ADC unit inputs does not have to coincide with the number of antennas M (or 2M if we consider in-phase and quadrature components of the received signals).

Further, the embodiment of Fig. 5 is not restricted to the case that the dither signal is uniformly distributed, but the dither signal can also be drawn from any other distribution.

Further, the quantizers are not restricted to be uniform symmetric quantizers and/or to have the same dynamic ranges.

The digital joint reconstruction block (132) is configured to jointly process all M quantization indices so that the output

provides a digital representation of M linear combinations with coefficients of the

quantizer inputs in

It is now assumed that ADC unit (120) contains M analog processing blocks (122) implemented according to the embodiment in Fig. 5 and M uniform symmetric quantizers of bits and dynamic range Recall the one-dimensional lattices interpretation of

the ADC unit (120) behavior given above. Then, according to the embodiment illustrated in Fig. 6, the joint digital joint reconstruction block (132) can be described as follows.

First, the quantization codewords corresponding to the M quantization indices provided by the ADC unit (120) are recovered. Then, the discrete-

time version of the dither signal corresponding to each quantization branch is subtracted

from the quantization codeword and modulo-Λ reduced:

Finally, the vector resulting from stacking is combined with the mixing matrix and modulo-Λ reduced again to the obtain the digital

reconstructions as:

-th digital reconstruction obtained by the joint digital reconstruction block (132) behaves as: where is an M

x M diagonal matrix containing the amplifier gains and denotes the uncorrelated quantization noise vector, with

uniformly distributed in The

equivalence in equation (14) follows from equations ( 12) and (11) and from applying standard properties of operations with lattices, see for example R. Zamir. "Lattice Coding for Signals and Networks." United Kingdom: Cambridge. University Press, 2014, assuming that the mixing matrix , it has integer coefficients, and det

Observe that from equation (14) we can conclude that the digital

reconstruction

is implemented according to the embodiment in Fig. 6, behaves as:

with probability

Further it is has to be mentioned that the dimension of the reconstruction f [fl does not necessarily have to be fixed, as has been assumed in the general description and embodiments. It is conceivable that it is adapted by the digital control block (134). Equivalently, it is conceivable that the size of the mixing matrix A is not fixed, but adapted by the digital control block (134). Equivalently, the mixing matrix A does not have to be a square matrix.

Further, it is conceivable that in the embodiment of Fig. 6 the dimension of the reconstruction f[-f] is not fixed, but adapted by the digital control block (134). Further, it is conceivable that the size of the mixing matrix A is not fixed, but adapted by the digital control block (134).

The digital control block (134) may be configured to adapt the behavior of (i) the analog processing blocks (122) in the ADC unit (120) and of (ii) the digital joint reconstruction block (132) in the DSP unit (130) to the spatial correlation of the received signals in and/or other aspects affecting the receiver performance with the final objective of maximizing some utility function of the individual communication rates between K

transmitters (140) and the multi-antenna digital receiver (100) subject to some quality-of- service requirements when the quantizers ( 124) have an input range of and a resolution of M bits. Let A denote the mixing matrix and <A the

corresponding feasible set, and let contain the M control signals applied to the

analog processing blocks (122) and Q the corresponding feasible set. Then, the digital control block (134) solves the following optimization problem:

given the co variance matrix

If (i) the ADC unit (120) comprises M analog processing blocks (122) implemented according to the embodiment in Fig. 5 and M uniform symmetric quantizers (124), and (ii) the digital joint reconstruction block (132) is implemented according to the embodiment in Fig. 6 for The combination of the previous embodiments can be mathematically modeled as:

with some probability (see equation (16)) depending on the parameters

with Then, the digital control block (134) has to select the amplifier gains (or diagonal matrix G) of the M analog processing

blocks (122) and the mixing matrix A required by the digital joint reconstruction

block (132), in order to maximize some utility function of the individual rates, provided that some quality of service is guaranteed:

given the co variance matrix . The exact dependence of the individual rates R k on the

optimization variables G and A is essentially determined by the particular encoding schemes used by the transmitters (140) and the decoder function used at the digital receiver (100). According to one possible embodiment, the transmitter (140) may use a Gaussian codebook, i.e., so that each codeword k is composed of a sequence of n i.i.d. zero-mean Gaussian random variables, In addition, consider that decoder at

the digital receiver follows the linear filtering plus nearest-neighbor decoding approach and needs to guarantee that

for some The quality-of-service constraint in (20) can be guaranteed for any

and a sufficiently long block length n, as long as where denotes the

generalized mutual information (GMI) given by:

In consequence, a good approach to maximize the supported rates under the previous assumptions (or other practical transmissions schemes) is to maximize some function, e.g., the sum, of the individual generalized mutual informations in (21), when ξ in(22) is

particularized for the model in (18). Then, the optimization problem to be solved by this particular embodiment of the digital control block (134) is

where we have defined the spatial covariance matrix of the received signals w (which under

the channel model described above is given by

matrix containing information about the bit-resolutions and input

ranges of the M quantizers (124), and the probabilities

Further, Fig. 7a provides an iterative algorithm to approximately solve the optimization problem in (24), and, thus, to select the parameters G and A required by the embodiments in Fig. 5 and Fig. 6. As such, Fig. 7a provides a possible embodiment of the digital control block (134) to adapt the amplifier gains G and the mixing matrix A to the spatial covariance matrix

20 of the received signals. In particular, the amplifier gains G and the mixing matrix A are obtained as the result of an iterative alternating optimization algorithm. Given some feasible G (step 700a), first A is obtained by applying a lattice reduction algorithm to matrix F , where F follows from the decomposition (step 7 10a), and, then, matrix G is

obtained by maximizing the utility function with A fixed (step 720a). This process is iterated until convergence (step 730a), wherein convergence can be given when a difference between an updated utility function, being the utility function corresponding to the updated amplifier gain matrix G and the updated mixing matrix A , and a previously updated utility function is below a threshold. Fig. 7b provides, in particular with steps 700b, 710b, 720b and 730b, an iterative algorithm to approximately solve the optimization problem in (24), when the amplifier gains are restricted to be of the form . This implies lower-complexity than the embodiment in Fig. 7a. As such, Fig. 7b provides an alternative embodiment of the digital control block to adapt the amplifier gains G and the mixing matrix A to the spatial covariance matrix of the received signals,

The estimation of y or any other information such as the probabilities in (25) and (26) required by the previous embodiments is out of the scope of the present invention disclosure, and, hence, this information is assumed to be known.

Further, Fig. 8 illustrates the low-complexity implementation of the algorithms of Figs. 7a/b with only one iteration. The amplifier gains G are selected based on some function or look-up table created off-line to maximize the adopted utility function, given the quantizer parameters in B, and indexed, e.g., by the received powers or the received SNR (step 810).

Given G, finally the matrix A is obtained by applying a lattice reduction algorithm to matrix F, where F follows from the decomposition

In order to illustrate the advantages and beneficial effects of the invention, the performance of both the conventional multi-antenna digital receiver architecture and the disclosed multi- antenna digital receiver architecture are compared through numerical simulations.

Recognizing the difficulty in isolating the effects of the receiver structure in the supported rates of the underlying communication system, a very simple, but convenient system model is adopted with the following points: • Transmitter Model: K users transmitting i.i.d. Gaussian codewords with powers

• Channel Model: Channel matrix H following an uncorrelated Rayleigh fading channel model. The effect of path-loss and received power imbalances are investigated by scaling the transmit powers.

• Conventional Receiver Model: Ai antennas, ADC unit with M uniform symmetric quantizers of b bits and dynamic range independent reconstruction blocks.

• Proposed Receiver Model: M antennas, ADC unit with M analog blocks implemented according the embodiment in Fig. 5 and M uniform symmetric quantizers of b bits and dynamic range , joint digital reconstruction implemented according to the

embodiment in Fig. 6, and digital control block running the algorithm in Fig. 7b.

• Decoder Model: Linear filtering plus nearest neighbor decoding.

The simulations results in Fig. 9 - Fig. 13 provide the total rate supported by the system (measured by the sum of the individual generalized mutual informations) averaged over 1000 channel realizations both for the conventional multi- antenna digital receiver architecture and the disclosed multi-antenna digital receiver architecture. For reference, the cut-set bound is also included, which provides a bound on the Shannon capacity of the underlying

communication system and serves as the fundamental sum-rate upper bound. In particular:

Fig. 9a shows the average sum-rate as function of the received S (equal for all

users) for

Fig. 9b shows the average sum-rate as function of the received (equal for all users) for, and b = 5 bits.

Fig. 10a shows the average sum-rate as function of the received (equal for all

users) for M .

Fig. 1 0b shows the average sum -rate as function of the received (equal for all

users) fo

Fig. 11a shows the average sum-rate as function of the number of receive antennas M at a received (equal for all users) for

Fig. 1 lb shows the average sum-rate as function of the number of receive antennas If at a received (equal for all users) for Fig. 12a shows the average sum-rate as function of the number of receive antennas M at a received (equal for all users) for K = 4, and b = 4 bits.

Fig. 12b shows the average sum-rate as function of the number of receive antennas M at a received (equal for all users) for K = 4, and b = 5 bits.

Fig. 13a shows the average sum-rate as function of the power imbalance ASNR for M = 40, when users 1 and 2 are received with SNR = 20 dB and users 3 and 4

are received with SNR = 20 + ASNR dB.

Fig. 13b shows the average sum-rate as function of the power imbalance ASNR for M = 40, K = 4, and b = 5 bits, when users 1 and 2 are received with SNR = 20 dB and users 3 and 4 are received with SNR = 20 + ASNR dB.

As can be derived from the above simulation results:

(a) The present invention supports higher sum-rates than conventional multi-antenna digital receivers when low-accuracy quantization is adopted. This gap can be substantially high in the medium- to high-SNR regime (see Fig. 9 and Fig. 10). (b) Given a sum-rate target, the proposed invention allows to reduce the quantization accuracy with respect to a conventional multi-antenna digital receiver architecture. The sum- rates for the proposed receiver architecture with 6 = 4 bits quantization in Fig. 9a and Fig. 10a are higher than the sum-rates for the conventional receiver architecture with b = 5 bits quantization in Fig. 9b and Fig. 10b. This means that we could guarantee the sum-rate achieved by the conventional with b = 5 bits quantization by using the disclosed receiver with b = 4 bits quantization.

(c) The proposed multi-antenna digital receiver architecture manages to exploit the correlation among the received signals leading to the benefits (a) and (b). This statement is supported by the results in Fig. 1 1 and Fig. 12. As the number of receive antennas are increased while keeping the number of users constant, the received signals get more and more correlated. In consequence, the sum-rate gap between the proposed and the conventional receiver architecture increases with the number of antennas.

(d) The proposed multi-antenna digital receiver architecture is more robust to receive power imbalances (see Fig. 13). Any receive power imbalance decreases the performance of the conventional receiver, as the analog-to-digital conversion process is adapted to the marginal statistics of the signal received at each antenna, which is a combination of the signals transmitted by the different users. In consequence, users received with higher powers are better adapted to the quantizers' input range. In contrast, the proposed receiver architecture can better deal with receive power imbalances, as this information is captured by the spatial correlation of the received signals. This is of high relevance and one of the main benefits of the present invention, since received power imbalances are always present in wireless communication systems, even when some kind of power control strategies are implemented.

(e) Hardware impairments in the RF processing chains before the ADC unit may result in the ADC inputs containing interferers (e.g., originating from non-ideal filtering) which can completely saturate the quantizers' input ranges. The multi-antenna digital receiver architecture according to the present invention is much more robust to this kind of impairments in the RF processing, as this information is included in correlation of the received signals. It has to be noted that even if the index M used in the description denotes the number of antennas, M can also denote the number of receiving chains instead of the number of antennas.

The invention has been described in conjunction with various embodiments herein. However, other variations to the enclosed embodiments can be understood and effected by those skilled in the art and practicing the claimed invention, from a study of the drawings, the disclosure and the appended claims. In these claims, the word "comprising" does not exclude other elements or steps and the indefinite article "a" or "an" does not exclude a plurality. A single processor or another unit may fulfill the function of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. A computer program may be stored/distributed on a suitable medium, such as an optical storage medium or a solid state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the internet or other wired or wireless

telecommunication systems.