Brief Description of the Invention

This invention relates generally to devices used to control power distribution. More particularly, this invention relates to operating a voltage sourced inverter so as to prevent saturation of inteφhase transformers connected to the voltage sourced inverter.

Background ofthe Invention

Harmonic neutralized voltage sourced inverters are being developed for electric power transmission and distribution systems. These devices have a set of switches that are used to convert a dc voltage signal into discretely displaced square waveforms The waveforms are subsequently combined to produce a high quality sinusoidal output signal

Inteφhase transformers have been used to combine the waveforms and simultaneously reduce harmonics in the resultant sinusoidal signal In steady state operation, the waveforms applied to an interphase transformer have no dc component and therefore the magnetic flux in the inteφhase transformer has a mean value of zero However, during system transients, broadly referred to herein to include system disturbances and system start-up conditions, the interphase transformer core is susceptible to large flux shifts, sometimes producing one-sided saturation of an inteφhase transformer core The saturation of an interphase transformer core prevents

it from supporting voltage, which can result in damage to an inverter as individual poles ofthe inverter become overloaded

In order to prevent magnetic saturation, interphase transformers can be designed to reduce flux density In particular, they can be designed with ratings approximately three times larger than that required for normal operation Unfortunately, the high device ratings result in large, heavy, and expensive interphase transformers Consequently, it would be highly desirable to develop a system to reduce the size, weight, and expense of inteφhase transformers

Summary ofthe Invention

The invention is an inverter switch firing control circuit to limit the flux and prevent the saturation of interphase transformers connected to a harmonic neutralized inverter The inverter switch firing control circuit includes a control module to execute a standard switch firing scheme to produce a set of inverter pole output signals including a first inverter pole output signal and a second inverter pole output signal, with the first inverter pole output signal having a predetermined phase displacement from the second inverter pole output signal The circuit also includes a control module to execute a system transient switch firing scheme wherein the inverter reduces the predetermined phase displacement between the first inverter pole output signal and the second inverter pole output signal in the presence of a system transient This reduction in phase displacement between inverter pole output signals prevents saturation of inteφhase transformers Thus, the size, cost, and weight of inteφhase transformers may be substantially reduced

Brief Description ofthe Drawings

For a better understanding ofthe nature and objects ofthe invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings, in which

FIGURE 1 illustrates a power control circuit incorporating the switch firing control circuit ofthe invention

FIGURE 2 illustrates processing steps associated with a saturation control switch firing program used in one embodiment ofthe switch firing control circuit ofthe invention

FIGURE 3 is a more detailed depiction of selected components of Figure 1 that may be used in accordance with the invention

FIGURE 4 illustrates the addition of two phase-displaced inverter pole output signals FIGURE 5 illustrates a sinusoidal signal generated by a twenty-four pole inverter

FIGURES 6-12 illustrate different interphase transformers that may be used in conjunction with the invention

FIGURE 13 is a detailed depiction of selected components that may be used in conjunction with the invention

FIGURE 14 is an enlarged view of selected components shown in Figure 13

FIGURES 15-18 illustrate the normal applied voltage and resultant flux associated with the inteφhase transformers of Figure 14

FIGURES 19-21 are vector illustrations showing the reduction ofthe phase- displacement between inverter pole output signals, in accordance with one embodiment ofthe invention

Like reference numerals refer to corresponding parts throughout the several views ofthe drawings

Detailed Description ofthe Invention

Figure 1 illustrates a power distribution control system 20 incorporating the technology ofthe present invention The system 20 includes a switch firing control circuit 22 that is used to fire the gates of an inverter 32 such that the output waveforms from the inverter do not saturate the cores of a set of inteφhase transformers 34 More particularly, the switch firing control circuit 22 is used to generate non-saturating inverter output waveforms during system transients As a consequence of this approach, the inteφhase transformers 34 can be constructed with reduced size, weight, and expense

The switch firing control circuit 22 may be implemented with a central processing unit (CPU) 24 connected via a bus 26 to a memory, which stores a saturation control switch firing program 28 The CPU 24 executes the saturation control switch firing program 28 to generate a set output signals The saturation control switch firing program 28 may be executed without relying upon the CPU 24

For example, in alternate embodiments, the program 28 is embedded in silicon or it is hardwired

Regardless ofthe implementation, the output signals from the saturation control switch firing program 28 are applied to interface devices 30 Interface devices 30 refer to any interface that is used between a low voltage control circuit and a high power device such as inverter 32 The output signals from the saturation control switch firing program 28 are processed by the interface devices 30 and are subsequently used to fire the switches ofthe inverter 32 The inverter 32 generates a set of inverter pole output signals that are applied to a set of inteφhase transformers 34 The interphase transformers 34 combine the inverter pole output signals

(waveforms) to attenuate or reduce particular harmonic components and thereby improve signal quality In the exemplary system of Figure 1, the combined inverter pole output signals are applied to a main transformer 36, which processes the signals to generate three-phase signals that are applied to a load 38 The load 38 refers to any standard load or an AC grid One or more transducers 40 are connected to the load 38 to identify system disturbances Each transducer 40 is connected by a bus 42 back to the interface devices 30, allowing a system disturbance signal to be processed by the switch firing control circuit 22

A general overview has been provided for one circuit topology that may incoφorate the technology ofthe present invention Attention presently turns to a more detailed consideration of the processing executed by the switch firing control circuit 22, more particularly the processing associated with its saturation control switch firing program 28

Figure 2 illustrates one approach to implementing the invention In particular, the figure illustrates that the switch firing control program 28 can initially assess whether system start-up conditions exist (step 50) If system start-up conditions do not exist, then an inquiry is made to determine whether there is a system disturbance (step 52) If there is no system disturbance, then a standard switch firing scheme is executed (step 54) A standard switch firing scheme is consistent with any number of prior art schemes for firing inverter switches to produce a multi-pulse approximation of a sinusoidal waveform

If a system start-up condition exists or if there is a system disturbance, then the switches ofthe inverter are fired to reduce the phase displacement between inverter

pole output signals (step 56). In other words, the standard switch firing scheme is abandoned. That is, the steady-state predetermined phase displacement between inverter pole output signals is altered in response to a system transient (either a system start-up condition or a system disturbance). The inverter pole output signals are altered by reducing the steady-state predetermined phase displacement existing between inverter pole output signals, thereby reducing flux As a consequence, the inteφhase transformers 34 are not as susceptible to saturation.

Thus, with the technology ofthe present invention, interphase transformers 34 do not have to be highly rated for transient conditions. Instead of handling transient conditions with large, heavy, and expensive components, the present invention relies upon a readily implemented control technique. Consequently, the inteφhase transformers 34 can be smaller, lighter, and less expensive.

The system start-up condition assessed at step 50 is readily recognized by any inverter controller. The system disturbance condition assessed at step 50 is based upon measurements for one or more transducers 40 connected to the load 38.

Techniques for measuring and processing system disturbances are widely known in the art. Sensors for measuring flux density are also known in the art. Such sensors may be used in implementing a firing strategy to reduce phase displacement, as will be discussed below. The reduction in inverter pole output signal phase displacement executed at step

56 may be by a predetermined amount. The reduction in phase displacement may be achieved in a single cycle or multiple cycles. In the multiple cycle embodiment, elements ofthe standard switch firing scheme may be used, between phase-back operations. The rate at which the phase displacement is altered may be tied to measurements made by a flux sensor. That is, the amount and rate of phase displacement may be established in response to flux measurements.

After phase displacement reduction operations are executed, processing returns to decision block 50 where the system start-up condition is tested once again If system start-up conditions exist (step 50), or if a system disturbance exists (step 52), then the reduction in inverter pole output signal phase displacement is reduced once again. This process is repeated until the system transient has disappeared, at which time the standard switch firing scheme is implemented once again.

The control strategy associated with the invention has now been fully described A general circuit topology within which to use the control strategy has also been described Attention presently turns to a more detailed discussion of an exemplary circuit topology and the operation of the invention within that circuit topology Figure 3 is a more detailed representation of some ofthe components of Figure 1

In particular, the figure shows an inverter 32, a set of interphase transformers 34, a main transformer 36, and a load 38 The inverter 32 includes a dc voltage source 60 and twelve inverter poles 62 Each inverter pole 62 includes a set of switches 64A and 64B. One switch (64 A) is connected to the positive node ofthe dc voltage source 60, while the other switch (64B) is connected to the negative node ofthe dc voltage source 60 Each switch 64 is typically implemented as a thyristor with an anti-parallel diode 66

Each switch 64 is turned on and off in response to commands received from the switch firing control circuit 22 (shown in Figure 1 ) The inverter poles 62 may be divided into inverter stages 68A-68D

As known in the art, each inverter pole 62 is used to "chop" a dc voltage signal from dc power supply 60 into a square wave By way of example, Figure 4 illustrates a square wave A, called an inverter pole output signal, formed by inverter pole 62 and carried on line 70 Figure 4 also illustrates a square wave B formed by another inverter pole and carried on line 72 Note that the inverter pole output signal B of Figure 4 is phase-displaced from the inverter pole output signal A of Figure 4

As known in the art, these phase-displaced inverter pole output signals can be combined by one or more inteφhase transformers 80 within a set of inteφhase transformers 34 Each inteφhase transformer 80 averages the voltage and equalizes the current ofthe discretely displaced inverter pole output signals applied to it The result of this operation for two poles is shown in Figure 4 The combined waveforms from the inteφhase transformer set 34 are further combined by the main transformer 36

The main transformer 36 includes a wye/wye transformer 81 and a delta/wye transformer 82 The wye/wye transformer 81 includes wye connected primary windings 83 (Inverter engineer terminology is used herein To an inverter engineer, the primary windings are on the inverter side of the system, and the secondary windings are on the ac output side of a transformer ) The wye/wye transformer 81

also includes wye connected secondary windings 84 The delta/wye transformer 82 includes delta connected primary windings 85 and wye connected secondary windings 86

As known in the art, the main transformer 36 combines all ofthe inverter pole output signals to form a multi-pulse signal Figure 5 illustrates a twenty-four pulse signal generated from the twelve poles of inverter 32 This signal appears at node A ofthe load 38 Identical, but phase-displaced, signals appear at nodes B and C It can now be appreciated that individual inverter pole output signals can be combined to form a multi-pulse output signal approximating a sinusoidal signal It can also be appreciated that the larger the number of poles in an inverter, the smoother the resultant output waveform

Figures 6-12 illustrate different types of inteφhase transformers that may be used in accordance with the invention As indicated above, where two or more inverter stages are combined or paralleled, inteφhase transformers (IPTs) 80 are employed to ensure equalization ofthe input currents and averaging ofthe input voltages Each IPT carries the current contributed by one inverter stage and supports the voltage difference between the inverter stage and the averaged output

Where only two inverter pole inputs to the IPTs are present, a simple center- tapped IPT 90 may be used, as shown in Figure 6 The center-tapped IPT 90 has a single winding 91 with a center tap 92 for coupling the IPT 90 with the main transformer 36 Conductors 93 and 94 couple winding 91 across two inverter poles The center-tapped IPT 90 may also be represented as a standard two input IPT 95 having two identical windings 96 and 97, as shown in Figure 7 A conductor 98 couples the IPT 95 to the main transformer 36 and conductors 99A and 99B couple the PT 95 to two inverter poles

Figure 8 illustrates a modular two input IPT 100 compπsing two modular transformers 102 and 104 with primary windings 106 and 108, respectively The pπmary windings 106 and 108 are in parallel and are coupled to the main transformer 36 by a conductor 110 Conductors 1 12 and 1 14 couple the respective primary windings 106 and 108 to the inverter 32 The transformers 102 and 104 each have secondary windings 1 16 and 1 18 which are connected in series

Figure 9 illustrates a modular three input IPT 120 having three modular transformers 122, 124, and 126 The transformers 122, 124, and 126 have respective

primary windings 128, 130, and 132 which are coupled together in parallel and connected by a conductor 134 to the main transformer 36 The primary windings 128, 130, and 132 are coupled to the inverter 32 by the respective conductors 136, 138, and 140 The transformers 122, 124, and 126 each have secondary windings 142, 144, and 146, respectively, which are in series

Referring to Figure 10, a zig-zag three input IPT 150 has three modular transformers 152, 154, and 156 In the zig-zag configuration, the primary of one transformer is connected in series with the secondary of another ofthe transformers The transformers 152, 154, and 156 each have primary windings 158, 160, and 162, respectively, which are coupled together and connected to the main transformer 36 by a conductor 164 The primary winding 158 of transformer 152 is in series with a secondary winding 166 of transformer 165, and winding 166 is coupled to the inverter by a conductor 168 The primary winding 160 of transformer 154 is in series with a secondary winding 170 of transformer 152, and winding 170 is coupled to the inverter by a conductor 172 The primary winding 162 of transformer 156 is in series with a secondary winding 174 of transformer 154, and winding 174 is coupled to the inverter by a conductor 176.

Referring to Figure 11, the modular concept of Figure 9 has been expanded into a multi-section modular IPT 180 which has a first modular transformer 182, a second modular transformer 184, and so forth, up to a final Nth modular transformer 186 The first modular transformer 182 has primary and secondary windings 188 and 190; the second modular transformer 184 has primary and secondary windings 192 and 194; and the final Nth modular transformer 186 has primary and secondary windings 196 and 198. Each ofthe primary windings 188, 192, and 196 are in parallel with one another and coupled by a conductor 220 to the main transformer 36 The primary windings 188, 192, and 196 are coupled to the inverter by conductors 202, 204, and 206, respectively The secondary windings 190, 192 and 198 are connected in series

Referring to Figure 12, the modular zig-zag concept of Figure 10 has been expanded into a multi-section modular zig-zag IPT 210 which has a first modular transformer 212, a second modular transformer 214, and so forth, up to a final Nth modular transformer 216 The first modular transformer 212 has primary and secondary windings 218 and 220, the second modular transformer 214 has primary and secondary windings 222 and 224, and the final Nth modular transformer 216 has

primary and secondary windings 226 and 228 The primary windings 218, 222, and 226 are coupled together and connected to the main transformer 36 by a conductor 230 The primary winding s 218 of transformer 212 is in series with the secondary winding 228 of the final Nth transformer 216, and winding 228 is coupled to the inverter by a conductor 232 The primary winding 222 of transformer 224 is in seπes with the secondary winding 220 of transformer 212, and winding 220 is coupled to the inverter by a conductor 234 The primary winding 226 ofthe final transformer 216 is in series with a secondary winding ofthe N-1 transformer (not shown). The secondary winding 224 ofthe second transformer is in series with a primary ofthe third transformer (not shown), and winding 224 is coupled to the inverter by a conductor 236.

Center-tapped IPTs 90 or 95 are particularly useful for combining pairs of inputs, but if only center-tapped IPTs are used, they are limited to combinations of even numbers of inputs. In some applications the center-tapped IPT 90 or 95 may be preferred over a modular approach because the volt-ampere (VA) rating ofthe center- tapped IPT 90 or 95 is half that ofthe modular IPT 100 However, the modular approach may be preferred for its flexibility, for example, use ofthe two, three and other multiple input modular IPTs 100, 120, and 180 may facilitate system design standardization because an identical modular transformer may be coupled to every inverter pole

Thus, when three or more inverter poles are to be combined, center-tapped, standard, modular or zig-zag IPTs as shown in Figures 6- 12, or combinations therefor, may be used Both modular and zig-zag IPTs may actually be considered as modular, since either type of IPT can be provided as separate two winding transformers for each input. For three input IPTs, a wye and delta winding or zig-zag windings on a single three phase core may also be used.

Figure 13 illustrates an alternate embodiment of a power distribution control system 20 A in accordance with the present invention In particular, Figure 13 illustrates a forty-eight pulse inverter 32 The output signals from the inverter 32 are delivered to a set of interphase transformers 34 in a staged configuration

Figure 14 is an enlarged view of the block 250 shown in Figure 13 Figure 14 illustrates that during steady-state conditions, the four inverter pole output signals have a phase displacement of 7 5° Two ofthe signals are combined at a first minor

stage interphase transformer 80X, while the remaining two signals are combined at a second minor stage interphase transformer 80Y The outputs from the minor stage inteφhase transformers 80X and 80Y are combined at a major stage inteφhase transformer 80Z In sum, the inteφhase transformers 80X, 80Y, and 80Z produce an output voltage equal to the average ofthe four phase-displaced inverter pole output signals.

Figure 15 illustrates the voltage waveform across each minor IPT 80X, 80Y Figure 16 illustrates the resultant flux in each minor IPT 80X, 80Y Figure 17 illustrates the voltage waveform across the major IPT 80Z, while Figure 18 illustrates the resultant flux in the major IPT 80Z Note that the flux only changes in response to the instantaneous voltage applied to an IPT In accordance with the invention, the change in flux is reduced by reducing the phase displacements between the inverter pole output signals.

The standard phase displacements between inverter pole output signals during steady state operation are illustrated by the vectors shown in Figure 19 In accordance with the invention, the standard phase displacement during steady state operation is reduced during a system transient, such as a start-up condition or a system disturbance. This reduction is phase displacement is illustrated by the vectors shown in Figure 20 As indicated in relation to Figure 2, the phase displacement reduction operation may be performed as a series of incremental steps The vectors of Figure 21 correspond to a fully phased back (0° displacement) output waveform The phase- back operation shown between Figures 19 and 21 can be performed in two discrete steps, in a plurality of steps, or according to feedback received from a flux sensor Reducing the phase displacement between inverter pole output signals degrades the quality ofthe output waveform delivered to the load 38 For example, the forty- eight pulse output waveform produced by the system of Figure 13 during steady-state conditions is reduced to a twelve pulse output waveform when fully phased back However, in accordance with the control strategy ofthe invention, this reduced quality waveform only results during system transients That is, the reduced quality waveform only exists during start-up and during serious system disturbances Consequently, steady-state waveforms are still high quality

Those skilled in the art will appreciate that the size, cost, and weight of interphase transformers can be substantially reduced, in accordance with the invention

These benefits stem from the fact that the phase displacement reduction operation of the invention reduces the maximum flux experienced by an interphase transformer With a smaller interphase transformer, leakage reactance and the related load current dependent increase in flux in part ofthe core will also be reduced. By preventing saturation ofthe inteφhase transformer core, good current sharing between inputs is preserved and no derating ofthe inverter is required

The foregoing descriptions of specific embodiments of the present invention are presented for puφoses of illustration and description They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, obviously many modifications and variations are possible in view ofthe above teachings. The embodi¬ ments were chosen and described in order to best explain the principles ofthe invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated It is intended that the scope ofthe invention be defined by the following Claims and their equivalents