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Title:
APPARATUS AND METHOD FOR VARYING AMPLITUDE AND PHASE OF SIGNALS ALONG MULTIPLE PARALLEL SIGNAL PATHS
Document Type and Number:
WIPO Patent Application WO/2018/091335
Kind Code:
A1
Abstract:
An apparatus (100; 400) for varying amplitude and phase of signals along at least one signal path (I) is disclosed. The apparatus comprises: an input (101) for receiving an input signal; an output (102) for providing an output signal; a splitter (10) configured to split the input signal into a plurality of phase shifted signals; a plurality of attenuators (20, 200; 500) controllable by corresponding control signals and configured to attenuate each of the plurality of phase shifted signals; and an adder (30) configured to add the attenuated signals and to provide the added signals as the output signal.

Inventors:
CHARTIER, Sébastien (Kiechelweg 17, Ulm, Ulm, DE)
PAGLIA, Angelo (Resi-Weglein-Gasse 3, Ulm, 89077, DE)
Application Number:
EP2017/078631
Publication Date:
May 24, 2018
Filing Date:
November 08, 2017
Export Citation:
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Assignee:
HENSOLDT SENSORS GMBH (Willy-Messerschmitt-Straße 1, Taufkirchen, 82024, DE)
International Classes:
H03H7/20; H03H7/18; H03H7/25; H03H11/20; H03H11/22; H03H11/24; H01P1/22; H04L27/20
Foreign References:
US4978932A1990-12-18
US4161705A1979-07-17
US20130135022A12013-05-30
US20080032653A12008-02-07
US20110140755A12011-06-16
KR20110015961A2011-02-17
Other References:
KWANG-JIN KOH; GABRIEL M. REBEIZ: "An X- and Ku-Band 8-Element Phased-Array Receiver in 0.18-pm SiGe BiCMOS Technology", IEEE JOURNAL OF SOLID-SATE CIRCUITS, vol. 43, no. 6, June 2008 (2008-06-01), XP011215775
UWE MAYER; MICHAEL WICKERT; RALF EICKHOFF; FRANK ELLINGER: "2-6-GHz BiCMOS Polar- Based Vector Modulator for S- and C-Band Diversity Receivers", IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, vol. 60, no. 3, June 2008 (2008-06-01)
BYUNG-WOOK MIN; GABRIEL M. REBEIZ: "A 10-50-GHz CMOS Distributed Step Attenuator With Low Loss and Low Phase Imbalance", IEEE JOURNAL OF SOLID-SATE CIRCUITS, vol. 42, no. 11, November 2007 (2007-11-01), XP011195892, DOI: doi:10.1109/JSSC.2007.907205
KYUNGWON KIM; HYO-SUNG LEE; BYUNG-WOOK MIN: "V-W Band CMOS Distributed Step Attenuator With low Phase Imbalance", IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, vol. 24, no. 8, August 2014 (2014-08-01), XP011554841, DOI: doi:10.1109/LMWC.2014.2322442
Attorney, Agent or Firm:
DR. KLAUS BEHRNDT // LIFETECH IP - SPIES & BEHRNDT PATENTANWÄLTE PARTG MBB (Elsenheimerstraße 47a, Munich, 80687, DE)
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Claims:
Claims

1. An apparatus (100; 400) for varying amplitude and phase of signals along at least one signal path (I), the apparatus comprising: an input (101 ) for receiving an input signal; an output (102) for providing an output signal; a splitter (10) configured to split the input signal into a plurality of phase shifted signals; a plurality of attenuators (20, 200; 500) controllable by corresponding control signals and configured to attenuate the plurality of phase shifted signals; and an adder (30) configured to add the attenuated signals and to provide the added signals as the output signal,

2. The apparatus (100; 400) according to claim 1 , each attenuator (20; 200;

500) comprising multiple transmission lines (210, 211 , ... ; 510, 511 , ...) along the signal path (I) and a plurality of varistors (220, 221 ,...; 520, 521 ,...) individually controllable by the corresponding control signals, wherein each varistor (220; 520) of the plurality of varistors (220, 221 ,...; 520, 521 ,..,) is arranged between adjacent transmission lines (210, 211 ; 510, 511 ) and is configured to lower an amplitude of a signal propagating along the signal path (I) depending on one of the control signals, the transmission lines (210, 211 , ... ; 510, 511 , ...) being configured to provide an impedance matching along the signal path (I).

3. The apparatus (100; 400) according to claim 2, wherein at least some of the attenuators (200; 500) comprise each at least m varistors (220, 221 , ...; 520, 521 , ...) and a decoder (230; 530), the corresponding control signal being input in the decoder (230; 530) and indicating n input states, the decoder (230) being configured to transform the n input states into m output control signals and to provide the output control signals to the m varistors (220, 221 , ... ; 520, 521 , ...) respectively, wherein m is larger than n.

The apparatus (100; 400) according to one of the preceding claims, wherein the splitter (10) is configured to generate as phase shifted signals from the input signal four vector signals (i+, i-, q+, q-) and to provide each of the vector signals (i+, i-, q+, q-) to one respective attenuator of the plurality of attenuators (20, 200; 500).

The apparatus (100; 400) according to one of the preceding claims, wherein the plurality of attenuators (20, 200; 500) includes an output attenuator (205; 505) arranged between the adder (30) and the output (102) to attenuate the added signal and provide the attenuated added signal as output signal.

Apparatus (100) according to one of the claims 2 to 5, wherein at least some of the attenuators (200, 201 , ...) comprise each a single-ended input (In) and a single-ended output (Out) connected by a corresponding portion of the signal path (I), and the varistors (220, 221 , ...) are configured to provide controllable parallel current paths between the portion of the signal path (I) and ground.

The apparatus (100) according to claim 6, wherein each varistor (221 , 222, ...) comprises a transistor (330, 331 , ... ) connected between the signal path (I) and the ground, the transistor (330, 331 , ... ) comprising a gate terminal controlled by one of the control signals, each varistor (220, 221 , ...) comprising, in particular, a capacitor connecting the signal path (I) to the ground for providing a phase adaptation of the signal propagating along the signal path (I).

8. The apparatus (400) according to one of the claims 2 to 5, the splitter (10) being further configured to provide, based on the phase- shifted signals, pairs of differential signals, wherein at least some of the attenuators (500, 501 , ...) comprise each a two-line input (ln+, In-) and a two-line output (Out+, Out-) connected by a first signal path (11 ) and a second signal path (I2) for enabling the attenuators (500, 501 , ...) to attenuate differential signals, a first plurality of transmission lines (510, 512, ...) being arranged along the first signal path (11 ) and a second plurality of transmission lines (51 1 , 513, ...) being arranged along the second signal path (I2), wherein one or more varistors (520, 521 ) are arranged between adjacent transmission lines (510, 512; 51 1 , 513) along the first signal path (11 ) and the second signal path (I2) to controllable connect the first signal path (11 ) with the second signal path (12), thereby attenuating the differential signals.

9. The apparatus (400) according to claim 8, wherein the first plurality of transmission lines (510, 512, ...) is arranged to decouple from the second plurality of transmission lines (51 1 , 513, . , .).

10. The apparatus (400) according to claim 8, wherein the first plurality of transmission lines (510, 512, ...) and the second plurality of transmission lines (51 , 513, ...) are coupled to each other to form pairs (610, 61 1 , ...) of transmission lines so that signals propagating along the first signal path (11 ) interact with signals propagating along the second signal path (I2), and wherein a respective varistor (620, 621 , ...) is arranged between neighboring pairs (610, 61 1 , ...) of transmission lines to attenuate amplitudes of signals propagating along the first signal path (11 ) and signals propagating along the second signal path (I2).

11. The apparatus (400) according to one of the claims 8 to 10, wherein each varistor (520, 521 , ...) comprises at least one transistor (720, 721 , ...; 830, 831 , ...) controlled by the control signals to simultaneously attenuate amplitudes of signals propagating along the first signal path (11 ) and signals propagating along the second signal path (I2). 2. A beamforming architecture comprising an antenna array and one or more transmit and/or receive modules with at least two apparatuses according to one of the claims 1 to 11.

13. The beamforming architecture according to claim 12, further comprising a control unit configured to control the plurality of attenuators (20, 200; 500) in the at least two apparatuses to direct a transmission beam in a defined transmission direction or to increase a sensitivity for a received beam from defined receiving direction.

14. An attenuator (500) for an apparatus according to one of the claims 1 to 11 , comprising: a two-line input (ln+, In-) and a two-line output (Out+, Out-) connected by a first signal path (11 ) and a second signal path (I2) for enabling the attenuator (500, 501 , ...) to attenuate differential signals; a first plurality of transmission lines (510, 512, ...) being arranged along the first signal path (11 ) and a second plurality of transmission lines (511 , 513, ...) being arranged along the second signal path (I2); and one or more varistors (520, 521) arranged between adjacent transmission lines (510, 512, 511 , 513) along the first signal path (11 ) and the second signal path (I2) to controllable connect the first signal path (11) with the second signal path (I2), thereby attenuating the differential signals.

15. A method for varying amplitude and phase of signals along a signal path (I), the method comprising: receiving (S110) an input signal; splitting (S120) the input signal into a plurality of phase shifted signals; attenuating (S130) the phase shifted signals based on corresponding control signals; and adding (S140) the attenuated signals and to provide the added signals as an output signal.

Description:
APPARATUS AND METHOD FOR VARYING AMPLITUDE AND PHASE OF SIGNALS ALONG MULTIPLE PARALLEL SIGNAL PATHS

Field of the Invention

The present invention relates to an apparatus and a method for varying amplitude and phase of signals and, in particular, to a distributed attenuator based vector modulator and a beamformer architecture using the distributed attenuator based vector modulator.

Background

In many applications such as ultra-wideband or phased-array antenna capable of covering several microwave bands (e.g. C-, X- and Ku-Band), there is a demand to vary the amplitude and phase of the received or sent signals over a very wide bandwidth. In particular, a current trend of modern phased-array antenna is to increase further the achievable RF bandwidth that can be covered by an antenna. This may lead in the future to several applications (e.g. communication applications and RADAR) in a single antenna system. The challenge for the transmit and/or receive modules is, however, to achieve phase and amplitude control over a wide frequency range.

An active phased-array antenna may, inter alia, use transmit and/or receive modules to steer the beam in a defined direction. To achieve the beam steering, phase and amplitude of signals are controlled within each module.

One possible way of achieving broadband phase and amplitude variations is to use a so-called vector modulator. A possible implementation of the vector modulator is as follows: The signal is split into four 90° phase shifted signals with equal amplitudes. Each of the four signals, also called vectors, is fed into an amplifier with amplitude variation capabilities (usually referred as variable gain amplifier or VGA). The four resulting vectors are finally combined within a signal adder (e.g. a passive power combiner). Based on this topology, a defined phase and amplitude variation can be achieved over a wide frequency range. Such systems are, for example, disclosed in: Kwang-Jin Koh, and Gabriel M. Rebeiz, "An X- and Ku-Band 8-Element Phased-Array Receiver in 0.18-pm SiGe BiC- MOS Technology" IEEE Journal of Solid-Sate Circuits, Vol. 43, No. 6, June 2008; and in Uwe Mayer, Michael Wickert, Ralf Eickhoff, and Frank Ellinger, "2- 6-GHz BiCMOS Polar- Based Vector Modulator for S- and C-Band Diversity Receivers" IEEE Transactions on Microwave Theory and Techniques, Vol. 60, Issue: 3, June 2008.

However, the known VGAs have several disadvantages. The transmission phase variation of the amplifier over the dynamic range is usually large. Phase compensation techniques can be applied to reduce this effect, however, they tend to be effective only over a narrow frequency range. This parasitic transmission phase variation can lead to inaccurate phase and amplitude control. Additionally, amplifiers require a trade-off between linearity and power consumption. A higher robustness against interferers and jamming requires a higher power consumption which is critical since transmit and/or receive modules have a limited prime power and cooling capability. An additional issue of VGAs used in a vector modulator is the variation over process-voltage-temperature (PVT). These variations can lead to an increased unreliability of the phase and amplitude control. Since a VGA usually requires an analog control (voltage or current) and since transmit and/or receive modules are usually controlled using a digital signal, a digital-analog converter (DAC) is necessary. The required DACs increase the overall power consumption and add further inaccuracy since they are also sensitive to PVT.

Another possible way to vary amplitudes are distributed step attenuators. Such attenuators are disclosed in: Byung-Wook Min and Gabriel M. Rebeiz, "A 10-50- GHz CMOS Distributed Step Attenuator With Low Loss and Low Phase Imbalance" IEEE Journal of Solid-Sate Circuits, Vol. 42, No. 11 , November 2007; and in Kyungwon Kim, Hyo-Sung Lee and Byung-Wook in, "V-W Band CMOS Distributed Step Attenuator With low Phase Imbalance" IEEE Microwave And Wireless Components Letters, Vol. 24, No. 8, August 2014.

However, because of its single-ended topology, the distributed step attenuator is very sensitive to parasitic effects created by the assembly. This is especially critical on silicon based semiconductor technology because the bond wire connecting the ground of the chip to the ground of the circuit carrier (e.g. printed circuit board or quad flat no-lead packaging) might strongly reduce the overall performance. This leads to an assembly/packaging problem.

Hence, there is a need for a circuitry that is capable of achieving an accurate phase and amplitude control over a wide bandwidth, a robust phase and amplitude accuracy over PVT and a high linearity. There is a further need to solve the mentioned assembly/packaging issues. There is yet another need for components that bring together the functionality required to achieve phase and amplitude variations within the transmit and/or receive module for providing a desired beam steering. Such systems will be referred hereafter as beamformer.

Summary

At least some of the above mentioned problems are solved by an apparatus according to claim 1 , a beamformer according to claim 13 and a method according to claim 15. The dependent claims relate to further advantageous realizations of the subject matter of the independent claims.

The present invention relates to an apparatus for varying amplitude and phase of a signal along at least one signal path. The apparatus comprises an input for receiving an input signal, an output for providing an output signal, a splitter, a plurality of attenuators, and an adder. The splitter is configured to split the input signal into a plurality of phase shifted signals. The attenuators are controllable by corresponding control signals and are configured to attenuate each of the plurality of phase shifted signals. The adder (or combiner) is configured to add the attenuated signals and to provide the added signals as the output signal.

It is understood that the apparatus is able to vary the amplitude and/or the phase of an input signal. It is not necessary that both the amplitude and the phase are varied. In addition, the variation in the phase can be achieved by different amplitude variations for different phase components of the signal. Therefore, even if the phase of a signal has been shifted when the signal passes the apparatus, this does not imply that apparatus directly shifts the phase. The apparatus may achieve this result by merely attenuating the signal components.

Furthermore, the plurality of phase shifted signals shall cover all possible number of phase shifted signals (e.g. 2, 3, 4, 6, 8, etc.). However, as it will be set out in detail below, it is of advantage to consider, for example, two or four phase shifted signals. The signals along the signal path may be signals received and/or sent by antenna modules. The attenuators may individually attenuate the corresponding signal component propagating through the respective attenuator. The adder is, for example, a vector adder that combines the signals such that the phase and amplitude of the signals are added (as vectors).

Optionally, each attenuator comprises multiple transmission lines along the signal path and a plurality of varistors, which are individually controllable by the corresponding control signals. Each varistor of the plurality of varistors may be arranged between adjacent transmission lines and is configured to lower an amplitude of a signal propagating along the signal path depending on one of the control signals.

The transmission lines may be configured to provide an impedance matching along the signal path. Impedance jumps may otherwise result in reflection of signals or other adverse losses along the signal path.

Optionally, at least some of the attenuators may comprise each at least m varis- tors and a decoder, wherein the corresponding control signal may be fed into the decoder and indicates n input states (n, m being integer numbers). The decoder may be configured to transform the n input states into m output control signals and to provide the output control signals to the m varistors respectively, wherein m is larger than n. It is understood that n signals do not necessarily imply n separate signal lines, they may also be transmitted over one line as non-interfering signals.

Optionally, the splitter may be configured to generate as phase shifted signals from the input signal four quadrature vector signals and to provide each of the quadrature vector signals to one respective attenuator of the plurality of attenuators.

Optionally, the plurality of attenuators may comprise an output attenuator arranged between the adder and the output to attenuate the added signal and provide the attenuated, added signal as output signal.

Optionally, at least some of the attenuators comprise each a single-ended input and a single-ended output connected by a corresponding portion of the signal path, and the varistors are configured to provide controllable parallel paths between the portion of the signal path and ground.

Optionally, each varistor comprises a transistor connected between the portion of the signal path and the ground, the transistor comprises a gate terminal controlled by one of the control signals. Each of the varistor may further comprise a capacitor connecting the signal path to the ground and providing a phase compensation or adaptation of the signal propagating along the portion of the signal path. These optional capacitors enable a reduction of the physical dimension of transmission lines.

Optionally, the splitter is further configured to provide, based on the phase- shifted signals, pairs of differential signals, At least some of the attenuators may comprise each a two-line input and a two-line output (i.e. the apparatus may not be single-ended) connected by a first signal path and a second signal path for enabling the attenuator to attenuate differential signals. In addition, a first plurality of transmission lines may be arranged along the first signal path and a second plurality of transmission lines may be arranged along the second signal line. One or more controllable varistors may be arranged between adjacent transmission lines along the first signal path and the second signal path to connect the first signal path with the second signal path, thereby attenuating the differential signals.

Optionally, the first plurality of transmission lines is arranged to decouple from the second plurality of transmission lines. In further embodiments the first plurality of transmission lines and the second plurality of transmission lines may couple to each other to form pairs so that signals propagating along the first signal path interact with signals propagating along the second signal path. Respective varistors may be arranged between neighboring pairs of transmission lines to attenuate amplitudes of the signals propagating along the first signal path and signals propagating along the second signal path.

Optionally, each varistor comprises at least one transistor controlled by the corresponding control signals to simultaneously attenuate amplitudes of signals propagating along the first signal path and signals propagating along the second signal path. Again, capacitors may connect the first and/or second signal path to the ground or with each other to provide a phase adaptation of the signal propagating along the first and/or second signal paths. Consequently, the physical dimension of transmission lines may be reduced.

The present invention relates also to a beamforming architecture with an antenna array and one or more transmit and/or receive modules and at least two of the apparatuses defined before (in this context these apparatuses are also called beamformers). Optionally, the beamforming architecture comprises a control unit configured to control the plurality of attenuators in the at least two apparatuses to direct (or steer) a transmission beam in a defined transmission direction or to increase a sensitivity for beams received from a defined receiving direction.

The present invention relates also to an attenuator suitable to be used within one of the defined apparatuses. The attenuator comprises a two-line input and a two-line output connected by a first signal path and a second signal path for enabling the attenuator to attenuate differential signals, a first plurality of transmission lines arranged along the first signal path and a second plurality of transmission lines arranged along the second signal line. One or more varistors are arranged between adjacent transmission lines along the first signal path and the second signal path to controllable connect the first signal path with the second signal path, thereby attenuating the differential signals.

The present invention relates further to a method for varying amplitude and phase of signals along a signal path. The method comprises the steps of: receiving an input signal, splitting the input signal into a plurality of phase shifted signals, attenuating the phase shifted signals based on corresponding control signals, and adding the attenuated signals and to provide the added signals as an output signal.

At least some of the problems of conventional systems mentioned at the beginning are solved by embodiments by using distributed step attenuators to vary amplitudes of the vectors within a vector modulator. Such a vector modulator may, for example, be part of a beamformer architecture. Embodiments of the distributed step attenuators have several essential advantages such as very low parasitic phase variation over amplitude sweep, high linearity, low-loss, high robustness against PVT and do not require DACs to operate. The particular differential topology is less sensitive to parasitic effects of assembly provides an assembly (e.g. wire bonding) and suppresses second-order effects such as second order harmonics (H2, H4, ...) and intermodulation distortion (e.g. IP2) . Embodiments thus allow achieving a wideband discrete amplitude sweep with excellent performance such as low transmission phase variation. At the opposite of previous art, embodiments aliow sweeping the amplitude of differential signals and are much less sensitive to parasitic effects of assembly (such as e.g. wire bonding).

!n particular, embodiments of the present invention solve the mentioned assembly/packaging issues when the differential architecture is used. This is especially attractive for silicon based semiconductor technologies because the circuits are often differential (e.g. gilbert cell mixers).

Both described main beamformer architectures are suited for implementation in a transmit and/or receive modu!e. The beamformers are based on the combination of a vector modulator and a distributed step attenuator for the purposes of phase and amplitude shifting, and an optional additional amplitude shifting, respectively. The vector modulator itself may make use of four distributed step attenuators as key components to accurately shift the amplitude and phase.

Brief description of the Figures

Some aspects of the invention wiil be described in the following by way of example only, and with reference to the accompanying figures, in which

Fig. 1 shows an apparatus for varying phase and amplitude of signals according to an embodiment of the present invention;

Fig. 2 depicts a possible architecture of a single-ended distributed step attenuator-based beamformer;

Fig. 3: depicts an exemplary basic topology of a single-ended distributed attenuator;

Fig. 4: depicts an exemplary circuitry of the basic topology of the single-ended distributed attenuator; Fig. 5: depicts a possible architecture of a differential distributed step attenuator based beamformer;

Fig. 6: depicts an exemplary basic topology of a differential distributed attenuator according to an embodiment of the present invention;

Fig. 7: depicts another exemplary basic topology of a differential distributed attenuator using coupled differential lines according to another embodiment;

Fig. 8: depicts an exemplary circuitry of the basic topology of the differential distributed step attenuator presented in FIG. 6;

Fig. 9: depicts an exemplary circuitry of the basic topology of the differential distributed step attenuator presented in FIG. 7; and

Fig. 10 depicts a flow diagram for a method for varying amplitude and phase of signals.

Detailed Description

The detailed description hereafter as well as the provided figures are only for the purpose of exemplary illustration and should not be seen as the only possible implementation of the invention. While the following description depicts two possible implementations that are sufficient for those skilled in the art to use the invention, it should be mentioned that other adaptations are possible without differentiating themselves from the core of the invention.

FIG. 1 shows an apparatus 100; 400 that is suitable for varying amplitude and phase of signals along at least one signal path I. The apparatus comprises an input 101 for receiving an input signal, an output 102 for providing an output signal, a splitter 10, a plurality of attenuators 20, 200; 500, and an adder 30. The splitter 10 is configured to split the input signal into a plurality of phase shifted signals. The plurality of attenuators 20, 200; 500 are controllable by corresponding control signals and are configured to attenuate individually each of the plural- ity of phase shifted signals. The adder 30 is configured to add the attenuated signals and to provide the added signals as the output signal. it is understood that the input 101 and/or the output 102 shall not be limited to single-ended input/output lines, but may also include inputs/outputs for multiple tines (e.g. for differential signals). The signal path I connecting the input 101 and the output 102 may include multiple signal paths, e.g. parallel signal paths may be present. The step of adding may be carried out as a combining in that the phase and amplitude of the signals are added (i.e. as a vector adding).

In particular, the apparatus shown in FIG. 1 can be a vector modulator based on distributed attenuators and may be used for a beamformer.

FIG. 2 depicts an embodiment for such vector modulator 160 having an input 101 and being connected to an output 102 via an output attenuator 205. The vector modulator 160 comprises the splitter 10 with a first splitter 11 and a second splitter 12. The first splitter 11 is connected between the input 101 and the second splitter 12 and splits an input signal at the input 101 into two phase components which may have a relative phase shift of 180°. The second splitter 12 generates four vector signals i+, I-, q+, q- based on the output of the first splitter 11. The vector signals i+, I-, q+, q- are each input into of four attenuators 201, 202, 203, and 204 which attenuate the corresponding vector signal i+, i-, q+, q-. The vector modulator 160 also comprises the adder 30 which receives output signals from the four attenuators 201 to 204 and adds the signals which are fed into the output attenuator 205 and subsequently to the output 102.

FIG. 2 further depicts below the phase and amplitude relations of a corresponding signals along the signal path I from the input 101 to the output 102. For example, P0 shows an exemplary phase and amplitude of the input signal of the first splitter 11. The first splitter 11 generates two signals which have a relative phase shift of 180° as it is depicted in P1. These two phase shifted components are fed into the second splitter 12 which generates four vector signals i+, i-, q+, q- from the two input signals, which may be the corresponding phase components of the input signal and the relative phase relations are indicated in the diagrams P2. For example, if the first vector signal i+ has the phase of 0°, the second vector signal i- has the phase of 180°, the third vector signal q+ has the phase of 90° and the fourth vector signal q- has the phase of 270°. The four attenuators 201 to 204 attenuate each of the vector signals generated by the second splitter 12. The result is shown in the phase diagrams P3. It is apparent that the phases of the attenuated signals are not changed, but the amplitudes are smaller. These four attenuated vector signals a.i+, b.i-, c.q+, d.q- (wherein a, b, c, d shall indicate the amount of attenuations) are fed into the adder 30 which adds the components and generates an output signal with the phase/amplitude depicted in P4. Finally, this added, attenuated signal (a.i+)+(b.i-)+(c.q+)+(d.q-) can be further attenuated by the output attenuator 205 resulting in the output signal:

((a.i+)+(b.i-Mc.q+)+(d.q-)).e where e again indicates the attenuation of output attenuator 205. The phase/amplitude of the output signal is indicated in P5. Thus, the phase as well as the amplitude of the output signal have changed when compared to the input signal (see P0).

The embodiment of FIG. 2 can, in particular, be used in a single-ended beam- former topology with the vector modulator 160 and the output attenuator 205 as an additional or external distributed step attenuator. As described, the vector modulator 160 is able to cover the entire phase range (usually 360°) and step (defined by the resolution) as well as part of the amplitude dynamic while the output attenuator 205 provides additional amplitude dynamic. In order to generate the four (in-quadrature) vectors i+, ϊ-, q+, q-, the input of the vector modulator 160 comprises a 180° power splitter (usually defined as unbalanced- balanced or balun) as the first splitter 11 and a quadrature power splitter as the second splitter 12. in case a large RF bandwidth is targeted, a possible implementation of the balun 11 is e.g. an active balun or a broadband passive topology such as the Marchand balun. The quadrature power splitter 12 can be designed using e.g. a resistor-capacitor-based polyphase filter or an inductor-capacitor based all-pass filter. For example, each of the four generated phase shifted vectors may be 90° phase shifted and as said before is then fed into one of the four distributed step attenuator 201 , 202, 203 and 204. At the output of the distributed step attenuators 201 , 202, 203 and 204 the four generated vectors with their own specific phase and amplitude are then combined in the vector adder 30. The vector adder 30 can either be active or passive. The amplitude of the resulting vector can be additionally changed using the output attenuator 205.

As further mentioned before, the proposed beamformer provides a drastic enhancement compared to prior art by using a distributed step attenuator topology. FIG. 3 presents a basic topology of a possible distributed step attenuator topology, i.e. an exemplary circuitry for each of the attenuators 201 , 202, The depicted attenuator 200 has a plurality of transmission lines 210, 211 , ... 213 which are connected along a signal path I between an input In and an output Out. Between pairs of adjacent transmission lines, a respective varistor 220, 221 ... 222 connects the signal path I to ground. For example, between the first transmission line 210 and the second transmission line 211 a first varistor 220 connects a node on the signal path I to ground. Between the second transmission line 211 and the third transmission line 212 a second varistor 221 connects likewise the signal path I to ground. This setup continues up the last transmission line 213 whose input is also connected via the last varistor 222 to ground.

The plurality of varistors 220, ... may include m varistors. Optionally a decoder 230 can be arranged between a control input of the attenuator 200 and may be configured to transform n input signals into m output signals which control the m varistors 220, ... . The number m may correspond to the number of possible achievable attenuations in the attenuator 200. For example, the attenuation may be done stepwise, wherein the steps may not exceed a predetermined value (for example to avoid any reflection). By changing the amount of actuated varistors 220, 221 and 222, the attenuation level can be controlled so that the m-stage attenuator 200 has 2 m possibilities of control. Since such a large amount of possibilities is often not required, the n to m bit decoder 230 can be used to convert the 2 m step attenuator to a 2" step attenuator where n<m. As a result, a distributed step attenuator with 2" amplitude settings is obtained.

In the presented distributed step attenuator 200, the transmission lines 210, 211 , 212 and 213 are used to match between the input and output impedance of the varistors 220, 221 and 222 which are placed between two of these lines.

FIG. 4 illustrates one of the possible implementation of an m-stage distributed step attenuator 200 (m being the amount of varistors) in a CMOS technology. However, it should be understood that the topology can be applied to any technology having field-effect transistors. In the embodiment of FIG. 4 the plurality of varistors 220, 221 , ... each comprises a corresponding transistor 330, 331 , 332 which connects a node between adjacent transmission lines 210, 211 , ... to ground. The transistors 330, 331 , 333 comprise each a gate terminal which is connected to a corresponding control terminal via a corresponding resistor 340, 341 , 342. The control terminals are able to receive the m control signals generated by the decoder 230. In addition, nodes between each pair of adjacent transmission lines 210, 211 are connected via corresponding capacitors 320, 321 , ... directly to ground and represent shunt capacitors to reduce the physical dimensions of the transmission lines and to provide phase compensation as well.

In particular, the depicted distributed step attenuator 200 may comprise m CMOS transistors (represented by 330, 331 and 332) used as varistors, and the transmission lines (represented by 310, 311 , 312 and 313) placed at the input and output of each CMOS transistor 330, 331 and 332. The connection of each transistor's gate to the resistor (represented by 340, 341 , 342) with a value of several k/3 provides a high impedance at this node. FIG. 5 depicts a possible architecture of a differential distributed step attenuator 400. This architecture may also be used as a beamformer, but may also be used for any other application where amplitude and phase adaptations are desired. it differs from the topology as shown in FIG. 2 in that each attenuator is replaced by differential step attenuators 501 , 502, 505. Again, the vector modulator 160 comprises a first splitter 11 (as in FIG. 2} and a second splitter 12 that is implemented, for example, as quadrature generator to output four vector signals i+, h q+, q-. In contrast to the embodiment of FIG. 2, each of the four vector signals i+, ϊ-, q+, q- is now split by corresponding splitter (e.g. power splitter) 430, 431 , 432, ... so that in total eight signals are generated from the input signal at the input In. These eight signals are now paired into four pairs, wherein each pair of signals may comprise a relative phase shift of 180° (differential signals). For example, the first attenuator 501 receives the vector signal i+ and the vector signal i-, and the second attenuator 502 receives the first vector signal I+ and the second vector signal k The same applies to the third and fourth attenuators 503 and 504 which receive each the third vector signal q+ and the fourth vector signal q- having a relative phase of 180°.

The four attenuators 501 to 504 apply now corresponding attenuations on the differential input signals and output attenuated differential signals a.i±, b.i±, c.q± and d.q± which are added by the adder 450 (a, b, c, d indicate again the attenuation levels). The adder 450 adds, for example, the component a.i+, b.i-, c.q- and d.q+ and, in the same way, the components: a.i-, b.i+, c.q+ and d.q- and outputs these two added components. The final attenuator 505 is again a differential attenuator which receives the two added components from the adder 450 and provides the two attenuated differential components (e indicates again the level of attenuation):

((a.i+)+(b.i-)+(c.q-)+(d.q+)).e and ((a.i-)+(b.i+)+(c.q+)+(d.q-)).e

These attenuated, added components are fed into a phase combining unit 470 that undo the phase split by the first splitter 11 (or inverts one of the signal) and adds the two differential signals to provide the final output signal at the output Out.

The phase and amplitude relations of the various components are again depicted at the bottom side of FIG. 5, wherein each arrow relates to one phase component. P0 refers to the input signal, P1 to the two phase components generated by the first split component 11, P2 are the four vector signals i+, ϊ-, q+, q-, which are combined into pairs of relative phase 180°. P3 indicates the eight phase components of the differential signals fed into the four attenuators 501 to 504. P4 illustrates the phases of the output components of the four attenuators 501 to 504. The added phase components are indicated in P5 which are attenuated by the output attenuator 505 to generate the vectors PS as the two output signals. The phase split of these output signals is reversed in the phase combining unit 470 resulting in an output signal with a phase/amplitude as indicated in P7.

The differential architecture is especially attractive for wideband systems where harmonics and other non-linear effects can much more easily fall in the band of use. Additionally, differential circuits using silicon-based semiconductor technologies are less sensitive to assembly's parasitic effects.

The depicted topology can again be used in a beamformer, wherein the vector modulator 160 is again used to cover the entire required phase range (usually 360°) and step (defined by the resolution) as well as part of the amplitude dynamic while the external distributed step attenuator as output attenuator 505 provides additional amplitude dynamic. As described before, this topology is based on two pairs of differential signals, one pair being 90° phase shifted compared to the other pair, which can again be achieved by splitting the input into two differential signals using an balun as first splitter 11. In case a large RF bandwidth is targeted, a possible implementation of the ba!un 11 comprises e.g. an active balun or a broadband passive topology such as the archand balun. The second splitter 12 can again be implemented by a quadrature power splitter. The quadrature power splitter 12 can be designed using e.g. a resistor-capacitor based polyphase filter or an inductor-capacitor based all-pass filter. Two in- quadrature differential signals are obtained at the output of the quadrature power splitter 12. After a split by the corresponding splitters (e.g. power splitter) 430, 431, 432, ... , the two pairs of differential signals, one pair being 90° phase shifted compared to the other pair go through the four distributed differential step attenuators 440, 441, 442 and 443 in order to shift their respective amplitude. The four resulting vectors are then summed within the signal adder 450. The vector at the output of the adder 450 can have its amplitude further shifted within the differential distributed step attenuator as the output attenuator 505. The differential vector is finally converted into a single-ended vector within a balun as phase combining unit 470.

FIG. 6 and FIG. 7 show two simplified basic embodiments of differential distributed step attenuators 500 comprising two input terminals In+, In- and two output terminals Out+, Out- that can be used in the topology in FIG. 5. They may also be usable in other applications.

In FIG. 6 a first signal path 11 connects a first input ln+ with a first output Out+ and a second signal path I2 connects a second input In- with a second output Out-. The input signals at ln+ and In- have a relative phase relation of 180°. As a result, the attenuation can be performed by connecting the first signal path 11 with the second signal path I2 by using varistors 520, 521, 522, ... . Again, transmission lines 510, 511, .... 517 are provided for an impedance matching along the first signal path 11 and along the second signal path 12. In particular, the lines 510, 512, 514 and 516 are used to match between the input and output impedance of the varistors 520, 522 and 524 which are placed between two of these lines. The lines 511 , 513, 515 and 517 are used to match between the input and output impedances of the varistors 521, 523 and 525 which are placed between two of these lines. In this differential distributed step attenuator 500, the transmission lines 510 and 511 along different signal paths 11, I2 are spatially separated so that they do not couple between each other. The same is valid for the fine pairs 512/513 » 514/515 as well as 516/517. In this embodiment the var- istors are provided in pairs 520/521, 522/523 and 524/525, each pair connecting the first signal path 11 with the second signal path 12. By changing the amount of actuated varistor pairs 520/521 , 522/523 and 524/525, the attenuation level can be controlled. In particular, the varistor pairs 520/521 , 522/523 and 524/525, may be controlled in the same way so that both varistors of one pair are turned on or turned off by a digital signal resulting in the desired attenuation of the propagating signals.

An m-stage attenuator (m being the amount of varistor pairs) has again 2 m possibilities of control. Since such a large amount of possibilities is often not required, a n to m bit decoder 230 may be used to convert the 2 m step attenuator to a 2" step attenuator where n<m. Therefore, a distributed step attenuator capable of varying the amplitude of differential signals with 2 n amplitude settings is obtained.

Although in the embodiment of FIG. 6 the transmission lines 510, 511 , 512, 513, ... decouple from each other, this is not a necessary condition. Rather, the transmission lines 510, 512, ... along the first signal path 11 may couple to the corresponding transmission lines 511, 513, ... along the second signal path I2.

FIG. 7 depicts such an implementation, where the transmission lines are pair- wise coupled to each other. For example, a first pair 610 comprises the first transmission line 510 and the second transmission line 511 of Fig. 6, a second pair 611 couples the second transmission line 512 along the first signal path 11 with the second transmission line 513 along the second signal path I2. Between adjacent pairs again corresponding varistors 620, 621 , ... are arranged to provide a desired attenuation of signals propagating along the first signal path 11 and the second signal path I2. The line pairs 610, 611 , 612 and 613 are again used to match between the input and output impedance of the varistors 620, 621 and 622 which are placed between two of these lines. In this differential distributed step attenuator 500, the line pairs 610, 611 , 612 and 613 are, in particular, differential coupled lines. This has the advantage of improving common-mode suppression within the entire exemplary beamformer architecture. By changing the amount of actuated varistors 620, 621 and 622, the attenuation level can be controlled. An m-stage attenuator has 2 m possibilities of control. Since such a large amount of possibilities is again often not required, a n to m bit decoder 230 can be used to convert the 2 m step attenuator to a 2 n step attenuator where n<m. Therefore, a distributed step attenuator 500 capable of varying the amplitude of differential signals with 2 n amplitude settings is obtained.

FIG. 8 and FIG. 9 depict possible realizations of the varistors shown in FIG. 6 and FIG. 7. Each of the varistors can again be realized by a transistor 720, 721 , ... (e.g. CMOS transistors), whose gate is connected via a resistor 740, 741 with a corresponding control terminal. The plurality of control terminals can again be connected to the decoder 230 and be controlled by an n input signal line which is decoded into m output signal lines which control the plurality of transistors.

FIG. 8 depicts an exemplary embodiment of the basic distributed step attenuator 500 topology presented in FIG. 6. The topology comprises the transmission lines 510, 511 , 512, 513, 514, 515, 516 and 517 which are used to match the input and output impedance of the CMOS transistors 720, 721 , 722, 723, 724 and 725. The CMOS transistors 720, 721 , 722, 723, 724 and 725 are used as varistors within this circuit, however other types of field effect transistors could also be used. The gate of each CMOS transistor 720, 721, 722, 723, 724 and 725 is terminated with the corresponding resistor 740, 741 , 742, 743, 744 and 745 with a value of several kn to provide a high impedance termination.

In order to reduce the physical dimensions of the transmission lines and to provide phase compensation as well, shunt capacitors (represented by 730, 731, 732, 733, 734 and 735) can be added to the standard topology. The capacitors 730, 731, 732, 733, 734 and 735 are connected to the transistors 720, 721 , 722, 723, 724 and 725, respectively. An m-stage attenuator has 2 m possibilities of control. Since such a large amount of possibilities is again often not required, a n to m bit decoder 230 can be used to convert the 2 m step attenuator to a 2 n step attenuator where n<m. Therefore, a distributed step attenuator capable of varying the amplitude of differential signals with 2" amplitude settings is obtained.

FIG. 9 depicts an exemplary embodiment of the basic distributed step attenuator topology presented in FIG. 7. The topology comprises the differentia! coupled transmission !ine pairs 610, 611 , 612 and 613 which are used to match the input and output impedance of CMOS transistors 830, 831 and 832 that are used as varistors in the embodiment. However, the invention is not limited to CMOS transistors, but other types of field effect transistors can also be used. The gate of each CMOS transistor 830, 831 and 832 is terminated with a resistor 840, 841 and 842 with a value of several k/2 to provide a high impedance termination. In order to reduce the physical dimensions of the transmission lines and to provide phase compensation as well, shunt capacitors (represented by 820, 821, 822, 823, 824 and 825) may again be added to the standard topology. The capacitor pairs 820/821, 822/823 and 824/ 825 are connected to the drain and source of the CMOS transistors 830, 831 and 832, respectively. An m-stage attenuator has 2 m possibilities of control. Since such a large amount of possibilities is not required, a n to m bit decoder 230 can again be used to convert the 2 m step attenuator to a 2 n step attenuator where n<m. Therefore, a distributed step attenuator capable of varying the amplitude of differential signals with 2 n amplitude settings is obtained.

It is understood that the apparatus 100 of FIG.2 and the apparatus 400 of Fig. 5 may in principle also be combined in that some of the attenuators may be single- ended and others not.

Embodiments of the present invention relate also to the distributed step attenua ¬ tors as described herein (e.g. in FIGs 6-9), which are very attractive circuit archi- tectures, because of its low loss, low parasitic transmission phase, high linearity and robustness against process, voltage and temperature variation. Additionally, no DACs are required to control the attenuator as need in conventional vector modulators.

FIG. 10 shows a flow diagram for a method for varying amplitude and phase of signals along a signal path I. The method comprises the steps: receiving S110 an input signal, splitting S120 the input signal into a plurality of phase shifted signals, attenuating S130 the phase shifted signals based on corresponding control signals, and adding S140 the attenuated signals and to provide the added signals as an output signal.

It is understood that each functional feature described in conjunction with the apparatus may also be implemented as further method steps. In addition, the method disclosed in the specification or in the claims may be implemented by a device having means for performing each of the respective acts of these methods.

Further, it is to be understood that the disclosure of multiple acts or functions disclosed in the specification or claims may not be construed as to be within the specific order. Therefore, the disclosure of multiple acts or functions will not limit these to a particular order unless such acts or functions are not interchangeable for technical reasons. Furthermore, in some examples a single act may include or may be broken into multiple sub acts. Such sub acts may be included and part of the disclosure of this single act unless explicitly excluded.

Furthermore, while each embodiment may stand on its own as a separate example, it is to be noted that in other embodiments the defined features can be combined differently, i.e. a particular feature descripted in one embodiment may also be realized in other embodiments. Such combinations are covered by the disclosure herein unless it is stated that a specific combination is not intended. List of reference signs

10 splitter

20, 200; 500 attenuators

30 adder

100, 400 apparatus for varying amplitudes

101 input

102 output

210,211 ,510,511 ,.. transmission lines

220,520, 620, varistors

230; 530 decoder

205, 505 output attenuators

320, 730 820 capacitors

330, 720, 830, . ..transistors

610, 611 , ... pairs of transmission lines

1, 11 , 12 signal paths

i+, q+, q- vector signals

ln+, In- differential input lines

Out+, Out- differential output lines