SWITCHING The present invention relates to switching systems. State of the art switching systems are described in the following publications:

"An In-Depth Look at Three Switching Hubs", (Translated reprint of) Telecoms & Reseaux No. 69, September, 1993, IDG Communications, France;

"The Switching Advantage", Kalpana EtherSwitch Publication, Fall, 1991;

Axner, David H., "Evaluating Switching Hub Architectures", Business Communications Review, July 1993, pp. 35-39; and

"Novell Application Performance Testing" , Synernetics Performance Networking, August 25, 1993.

The present invention seeks to provide an improved switching system and methods for using the same.

There is thus provided in accordance with a preferred embodiment of the present invention communication switching apparatus for providing communication between a multiplicity of digital information processors, the apparatus including a plurality of ports each

communicating with at least one of the multiplicity of digital information processors, and a port interconnector operative to provide communication between more than one pair of ports from among the plurality of ports, characterized in that, when an overflow of information is caused at the port interconnector or at one of the plurality of ports, an overflow indication is provided to the digital information processors which communicate with the port interconnector or with the overflowed one of the plurality of ports.

Further in accordance with a preferred embodiment of the present invention each individual port includes an information overflow sensor and indicator operative to sense an overflow arriving from an individual digital information processor communicating therewith and to provide an overflow indication to the digital information processors communicating with the individual port.

Still further in accordance with a preferred embodiment of the present invention the port interconnector includes an information overflow sensor and indicator operative to sense an overflow arriving from an individual digital information processor and to provide an overflow indication to the digital information processors associated with the port interconnector. Additionally in accordance with a preferred embodiment of the present invention each digital information processor is operative to refrain from transmitting information when it encounters a traffic congestion symptom and wherein the overflow indication includes an artificially generated occurrence of the traffic congestion symptom.

Also in accordance with a preferred embodiment of the present invention the communication provided includes LAN communication. Further in accordance with a preferred embodiment of the present invention the multiplicity of processors includes at least one printer.

Still further in accordance with a preferred embodiment of the present invention the multiplicity of processors includes at least one workstation.

Additionally in accordance with a preferred embodiment of the present invention the multiplicity of processors includes at least one computer.

The present invention will be understood and appreciated from the following detailed description, taken in conjunction with the drawings in which:

Fig. 1 is a simplified functional block diagram of a plurality of interconnected communication switching systems 10 which are each constructed and operative in accordance with a preferred embodiment of the present invention;

Fig. 2 is a simplified block diagram of an individual one of ports 60; and

Fig. 3 is a simplified flowchart of a preferred method for selective activation of congestion symptom simulation.

Reference is now made to Fig. 1 which is a simplified functional block diagram of a plurality of interconnected communication switching systems 10 which are each constructed and operative in accordance with a preferred embodiment of the present invention. Each

system 10 typically interfaces with and provides communication between a multiplicity of digital information processors 20 such as but not limited to PC's 30, printers 40 and workstations 50. Alternatively or in addition, each system 10 may interface with one or more similar systems 10 as shown.

Each switching system 10 typically includes a plurality of ports 60, each of which is connected to one or more of the digital information processors 20. The plurality of ports 60 are interconnected through a switching fabric 70, also termed herein a "port interconnector" . It is a particular feature of the present invention that, when an overflow of information arrives from one or more digital information processors 20 which flow toward a common element such as an individual port 60 or the switching fabric 70, an overflow indication is provided to the digital information processor/s which flow toward the common element.

According to one preferred embodiment of the present invention, the ports 60 each comprise back pressurizing ports which implement the above overflow indication providing feature. Alternatively, the switching fabric 70 may comprise a back pressurizing switching fabric which implements the above overflow indication providing feature.

It is appreciated that, commonly, conventional digital information processors are operative to refrain from transmitting information when they encounter a traffic congestion symptom. Accordingly, the back pressurizing port or back pressurizing switching

fabric of the present invention is preferably operative to artificially generate an occurrence of the traffic congestion symptom.

For example, in Ethernet and in the IEEE 802.3 protocol, the associated digital information processor only transmits information over the communication link (e.g. the communication link to a corresponding port, in Fig. 1) if it does not sense a carrier signal. If a carrier signal is sensed, no information is transmitted. Accordingly, the back pressurizing port or back pressurizing switching fabric of the present invention is preferably operative to transmit an artificial "carrier signal" to the offending digital information processor.

In the present specification, the term "carrier signal" is intended to include any type of signal which indicates to a digital information processor receiving the carrier signal that there is traffic and that, therefore, no information should be transmitted at the present time.

Reference is now made to Fig. 2 which is a simplified block diagram of an individual one of ports 60.

The port 60 preferably includes a line interface 100 which receives and transmits information from and to the digital information processors. The line interface 100 preferably carries out all information processor-switching system interface operations such as regulating use of the transmission line between the system and the information processor, interpretation of data and extracting clocks from data, all during reception, as well as converse operations during transmission to the information processors. A received information buffer 110

stores information received from the digital information processors via the line interface 100 until it can be dealt with by controller 120. According to a first preferred embodiment of the present invention, an entire unit of data, such as an entire packet or an entire cell, is received from the digital information processors and stored in RX buffer 110 before the unit of data is forwarded by controller 120 to a switching fabric interface 130.

Alternatively, data is transferred to the switching fabric interface 130 as it is received in which case the RX buffer 110 is only employed to stored data which cannot be transferred due, typically, to congestion at the switching fabric interface.

The switching fabric interface 130 performs all necessary interface operations in order to transmit and receive data from the back-pressurizing port 60 to the switching fabric 70 and vice versa.

A TX buffer 140 is provided which stores information being transferred from the switching fabric interface 130 to the digital information processors via line interface 100.

Typically, information is transferred as soon as it is received unless there is congestion at the line interface 100. Alternatively, however, an entire data unit, such as a packet or cell, is accumulated in the TX buffer before being transferred to the line interface 100.

A congestion symptom simulator 150 is operative to simulate a symptom of congestion which is transferred to the digital information processors via the line interface 100, thereby to prevent the processors from transmitting any more information until the congestion situation

is alleviated. For example: a. In Ethernet or IEEE 802.3 applications, a carrier is transmitted to the digital information processors. The carrier may, for example, comprise a square wave of frequency 5 MHz transmitted for 1.8 msec, fol¬ lowed by a 5.6 microsec pause, and then followed by the square wave again, and so on.

If a digital information processor initiates transmission during one of the pauses, this occurrence is dealt with the same as an occurrence of collision, which eventuality is dealt with in the IEEE 802.3 protocol. Preferably, the carrier is discontinued if information arrives from the switching fabric interface which is intended for the digital information processors whose transmission it is desired to block. In this case, the information is allowed to reach the digital information processor, via TX buffer 140 and the line interface since transmission of genuine information to the digital information processor is effective in blocking transmission from the processor. Once all the information has reached the processor, and if the port 60 is still congested, transmission of the carrier signal is renewed. b. In Token Ring applications (IEEE 802.5), the processors and the port to which they are linked belong to a Ring which shares a single token. Each processor only transmits when it is in possession of the token. In this case, the congestion symptom simulator 150 prevents the processors from ever obtaining a token while congestion of the port exists. This is typically done by utilizing the priority system. The processors only obtain a token when

their own priority is greater than or equal to the token's priority. Therefore, the processors' ability to gain the token can be eliminated by giving the token a priority level, such as priority level 7, which exceeds the priority level of all of the processors.

The operation of all units of the port 60 are controlled by a controller 120. The controller is responsible for: a. Monitoring transfer of information from the line interface 100 into the RX buffer, from the RX buffer onto the switching fabric interface 130, from the switching fabric interface 130 onto the TX buffer and from the TX buffer onto the line interface; and b. Selectively activating congestion symptom simulation by the simulator 150. A preferred method for selective activation of congestion symptom simulation is now described with reference to Fig. 3.

Fig. 3 is a simplified flowchart of a preferred method for selective activation of 'congestion symptom simulation. The method of Fig. 3 preferably includes the following steps: STEP 200: Initially, the back pressurizing function is not activated. In the illustrated embodiment, this is implemented by deactivation of the congestion symptom simulator 150. STEP 210: A congestion criterion is inspected. For example, the criterion may be whether or not there is a predetermined amount of space left in the RX buffer 110. If the congestion criterion is not satisfied, return to step 200. If the congestion criterion is satisfied (STEP 220) , operate the back pressurizing function, or, in other words,

activate congestion symptom simulator 150.

STEP 230: A congestion criterion is inspected. For example, the criterion may be whether or not there is a predetermined amount of space left in the RX buffer 110. If the congestion criterion is satisfied, return to step 220. If the congestion criterion is not satisfied, return to step 200.

It is appreciated that the chips described above with reference to the Appendices are intended only to provide an extremely detailed disclosure of a sample embodiment of the present invention and is not intended to be limiting. It is appreciated that various features of the invention which are, for clarity, described in the contexts of separate embodiments may also be provided in combination in a single embodiment. Conversely, various features of the invention which are, for brevity, described in the context of a single embodiment may also be provided separately or in any suitable subcombination.

It will be appreciated by persons skilled in the art that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention is defined only by the claims that follow: