ARC-SUPPRESSING DEVICE

Title:

ARC-SUPPRESSING DEVICE

Document Type and Number:

WIPO Patent Application WO/2018/146942

Kind Code:

A1

Abstract:

[Problem] To provide an arc-suppressing device capable of suppressing the occurrence of an arc even at shutdown time of a large current. [Solution] Provided is the arc-suppressing device comprising: a current-limiting circuit installed in parallel to a circuit breaker switching between supplying and shutting down the power from a power source to a load; a first protector installed in front of or behind the current-limiting circuit, for shutting down the current from the power source if a current of a predetermined amount or greater flows in the current-limiting circuit for a predetermined duration or longer; and a second protector for shutting down the current from the power source after the first protector has shut down the current from the power source. When the power from the power source is being supplied to the load, the current-limiting circuit shuts down the current from the power source. When the supply of the power from the power source to the load has been shut down, the current-limiting circuit causes the current of the predetermined amount or greater, which arises from the potential difference occurring at shutdown time, to flow for shorter than the predetermined duration, and then shuts down the current from the power source.

Inventors:

MORITA TADASHI (JP)

Application Number:

PCT/JP2017/044947

Publication Date:

August 16, 2018

Filing Date:

December 14, 2017

Export Citation:

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Assignee:

SONY CORP (JP)

International Classes:

H01H47/00; H01H9/54; H01H37/76; H01H85/38; H01H85/46; H02H3/087; H01H33/59

Domestic Patent References:

WO2015002187A1	2015-01-08
WO2016194584A1	2016-12-08

Foreign References:

US4658320A	1987-04-14
US5536980A	1996-07-16
JP2015115173A	2015-06-22
JP2003203721A	2003-07-18
JP2014522088A	2014-08-28

Other References: